PE3335 Datasheet, PDF (6/15 Pages) Peregrine Semiconductor Corp. – 3000 MHz UltraCMOS™ Integer-N PLL for Low Phase Noise Applications

PE3335
Product Specification
Table 6. AC Characteristics: V_DD = 3.0 V, -40° C < T_A < 85° C, unless otherwise specified
Symbol
Parameter
Control Interface and Latches (see Figures 3, 4, 5)
Conditions
Min
Max
Units
fClk
Serial data clock frequency
tClkH
Serial clock HIGH time
10
MHz
30
ns
tClkL
Serial clock LOW time
tDSU
Sdata set-up time after Sclk rising edge, D[7:0] set-up time
to M1_WR, M2_WR, A_WR, E_WR rising edge
tDHLD
Sdata hold time after Sclk rising edge, D[7:0] hold time to
M1_WR, M2_WR, A_WR, E_WR rising edge
tPW
S_WR, M1_WR, M2_WR, A_WR, E_WR pulse width
30
ns
10
ns
10
ns
30
ns
tCWR
Sclk rising edge to S_WR rising edge. S_WR, M1_WR,
M2_WR, A_WR falling edge to Hop_WR rising edge
tCE
Sclk falling edge to E_WR transition
30
ns
30
ns
tWRC
S_WR falling edge to Sclk rising edge. Hop_WR falling
edge to S_WR, M1_WR, M2_WR, A_WR rising edge
tEC
E_WR transition to Sclk rising edge
30
ns
30
ns
tMDO
MSEL data out delay after Fin rising edge
CL = 12 pf
8
ns
Main Divider (Including Prescaler)
Fin
Operating frequency
500
3000
MHz
PFin
Input level range
Main Divider (Prescaler Bypassed)
External AC coupling
-5
5
dBm
Fin
Operating frequency
PFin
Input level range
50
300
MHz
External AC coupling
-5
5
dBm
Reference Divider
fr
Operating frequency
Pfr
Reference input power
(Note 1)
Single ended input
(Note 2)
100
-2
10
MHz
dBm
Vfr
Input sensitivity
Phase Detector
External AC coupling
0.5
VP-P
(Note 3)
fc
Comparison frequency
(Note 1)
20
MHz
Note 1:
Note 2:
Note 3:
Parameter is guaranteed through characterization only and is not tested.
Running at low frequencies (< 10 MHz sinewave), the device will still be functional but may cause phase noise degradation. Inserting a low-
noise amplifier to square up the edges is recommended at lower input frequencies.
CMOS logic levels may be used if DC coupled. For optimum phase noise performance, the reference input falling edge rate should be faster
than 80mV/ns.
©2005 Peregrine Semiconductor Corp. All rights reserved.
Page 6 of 15
Document No. 70-0049-02 │ UltraCMOS™ RFIC Solutions