MN838898 Datasheet, PDF (9/20 Pages) Panasonic Semiconductor – CMOS LSI source driver for color TFT LCD panels

MN838898
6.8 Relationship between Input Data and Output Voltage
6.8.1 Built-In Gamma Adjustment Resistors
The output voltage depends on the input data and thirteen gamma adjustment voltages
(V_{REF x}, x = H, 0 to 10, L). See graph and conversion table on the next two pages.
V_REF0
V_REF1
V_REF2
Inside LSI
R0
R1
The LSI contains ten divider resistances and two switches
between V_REGF0 and V_REGF10. Table 6.8 summarizes the
formulas for calculating the output voltages from the
voltages applied to pins V_{REF x}, x = 0 to 10. Applying
voltages only to V_REF0 and V_REF10 produces the default
graph shown in Figure 6.8.2.
Note that we recommend the use of an operational
amplifier or similar means to guarantee low-impedance
input to the V_REF pins.
Direct input sometimes fails to produce the desired output
voltages.
V_REF3
R2
V_REF4
V_REF5
(Note 1)
R3
The adjustment voltages (V_{REF x}, x = H, 0 to 10) must
satisfy one of the following two relationships.
R4
AV_DD > V_REF0 ≥ V_REF1 ≥ V_REF2 ≥ ・・・・
or
・・・・ ^{≥ V}REF9 ^{≥ V}REFL10 ^> AVSS
V_REF6
V_REF7
R5
AV_DD ^> VREF10^≥ VREF9 ^≥ VREF8 ^≥ ・・・・
・・・・ ^{≥ V}REF1 ^{≥ V}REF0 ^{> AV}SS
Do not change these voltages while the chip is in
R6
operation.
V_REF8
R7
The following are the values for the internal resistances
R0 to R9 for R2=1.0.
Gamma Adjustment Resistances
V_REF9
R8
V_REF10
R9
Figure 6.8.1
Built-In Gamma Adjustment Resistors
R0　　　
1.15
R1　　　
1.09
R2　　　
1.00
R3　　　
1.00
R4　　　
1.00
R5　　　
1.00
R6　　　
1.00
R7　　　
1.00
R8　　　
1.09
R9　　　
1.15
SDF00030AEM
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