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MN838898 Datasheet, PDF (5/20 Pages) Panasonic Semiconductor – CMOS LSI source driver for color TFT LCD panels
MN838898
 6.2 Relationships Between Data Input and Output Pins
(1) Gray scale data input (MODE2 = Low)
The following summarizes the relationships between data input and output pins for gray scale
data input (MODE2 = Low).
So, binary data input is naturally ignored during gray scale data input.
MODE2 = Low, RL = High
Rn 6 DX0 to 5
Bn
6 DY0 to 5
Source driver shifts right (RL = High)
Gn
6 DZ0 to 5
n=1, 2・, ・・,120 (108) YX1 YY1 YZ1 YX2 YY2 YZ2
324 outputs
YX120YY120 YZ120
R1 B1 G1 R2 B2 G2
R1 B1 G1 R2 B2 G2
R120 B120 G120
(R108) (B108) (G108)
R120 B120 G120
(R108) (B108) (G108)
R1 B1 G1 R2 B2 G2
MODE2 = Low, RL = Low
R1 B1 G1 R2 B2 G2
R1 B1 G1 R2 B2 G2
R120 B120 G120
(R108) (B108) (G108)
324 outputs
R120 B120 G120
(R108) (B108) (G108)
R120 B120 G120
(R108) (B108) (G108)
R1 B1 G1 R2 B2 G2
R120 B120 G120
(R108) (B108) (G108)
YZ120 YY120YX120YZ119YY119YX119
Rn 6 DZ0 to 5
Bn
6 DY0 to 5
Gn
6 DX0 to 5
Source driver shifts left (RL = Low)
n=1, 2・, ・・,120 (108)
YZ1 YY1 YX1
(2) Binary input (MODE2 = High)
Binary input uses only the pins DX5, DY5, and DZ5. The relationships between data input
and output pins are otherwise the same.
So, binary data input is naturally ignored during gray scale data input.
SDF00030AEM
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