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MN66279RSC Datasheet, PDF (82/96 Pages) Panasonic Semiconductor – LSI FOR COMPACT DISC/CD ROM PLAYER
MN662790RSC
VARF
1.0 V[P-P]
(typ.)

VCC5Vʹ5.0 V
VDDʹ3.3 V, VSSʹV
AVDDʹ3.3 V, AVSSʹ0 V
Ta=ʵ30 ˆ to ʴ85 ˆ
fX1ʹ16.9344 MHz or 33.8688 MHz
VDD
0.001 µF
100 kЊ
68 kЊ
0.022 µF
27 kЊ
100 kЊ
0.068 µF
IREF
ARF
DRF
DSLF
PLLF
1200 pF
330 Њ
0.33 µF
220 kЊ
PLLF2
PCK / DSLB
2.7 kЊ
VCOF*
0.33 µF
2.7 kЊ
VCOF2
0.33 µF
Recommended Circuit Diagram to DSL / PLL and Jitter-free VCOF Blocks
* When 4x-speed playback mode with a 16.9344-MHz clock or a jitter-free function is not used, connect the
VCOF pin to VDD or ground.
* It is necessary to change a value of the resistor connected to IREF pin to adjust the oscillation frequency in 4x-
speed playback mode.
Note 13)
Note 14)
Insert a 100-kЊ resistor between the DSLF and PCK / DSLB pins or between the DSLF and
DSLBDA pins to use the DSL balance correction function.
This recommended circuit is typical, so it is necessary to choose external components' values with due
regard to playability.
SDD00025AEM
82