N25S830HA_14 Datasheet, PDF (9/12 Pages) ON Semiconductor – 256 kb Low Power Serial SRAMs

N25S830HA
CS
SCK
0 1 2 3 4 5 6 7 8 9 10 11
21 22 23 24 25 26 27 28 29 30 31
Instruction
16−bit address
SI 0 0 0 0 0 0 1 0 15 14 13 12 2 1 0 7 6 5 4 3 2 1 0
ADDR 1
Data In to ADDR 1
SO
High−Z
32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47
Data In to ADDR 2
Data In to ADDR 3
Data In to ADDR n
7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 ^... 7 6 5 4 3 2 1 0
High−Z
Figure 11. Page and Burst WRITE Sequence
SI
16−bit address
Page address (X)
Word address (Y)
SO
Data Words: sequential, at the end of the page the
address wraps back to the beginning of the page
Page X
Word Y
Page X Page X
Word Y+1 Word Y+2
Page X Page X
Word 31 Word 0
Page X
Word 1
High−Z
Figure 12. Page WRITE Sequence
SI
16−bit address
Page address (X)
Word address (Y)
SO
...
...
Page X Page X
Word Y Word Y+1
Page X Page X+1 Page X+1
Word 31 Word 0 Word 1
Page X+1 Page X+2 Page X+2
Word 31 Word 0 Word 1
Data Words: sequential, at the end of the page the address wraps to the beginning of the page and
continues incrementing up to the starting word address. At that time, the address increments to the
next page and the burst continues.
High−Z
Figure 13. Burst WRITE Sequence
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