English
Language : 

CAT9557 Datasheet, PDF (8/17 Pages) ON Semiconductor – 8-Bit I2C-Bus and SMBus I/O Port
CAT9557
PIN DESCRIPTION
SCL: Serial Clock
The serial clock input clocks all data transferred into or out
of the device. The SCL line requires a pull−up resistor if it
is driven by an open drain output.
SDA: Serial Data/Address
The bidirectional serial data/address pin is used to transfer
all data into and out of the device. The SDA pin is an open
drain output and can be wire−ORed with other open drain or
open collector outputs. A pull−up resistor must be connected
from SDA line to VDD. The value of the pull−up resistor, RP,
can be calculated based on minimum and maximum values
from Figures 7 and 8 (see Note 13).
RESET Input
A reset can be accomplished by holding the RESET pin
LOW for a minimum of tw(rst). The CAT9557 registers and
SMBus/I2C−bus state machine will be held in their default
state until the RESET input is once again HIGH. This input
requires a pull−up resistor to VDD if no active connection is
used.
A0, A1, A2: Device Address Inputs
These inputs are used for extended addressing capability.
The A0, A1, A2 pins should be hardwired to VDD or VSS.
When hardwired, up to eight CAT9557s may be addressed
on a single bus system. The levels on these inputs are
compared with corresponding bits, A2, A1, A0, from the
slave address byte.
I/O0 to I/O7: Input / Output Ports
Any of these pins may be configured as input or output.
The simplified schematic of I/O0 is shown in Figure 3 and
the simplified schematic of I/O1 to I/O7 is shown in Figure 4.
When an I/O is configured as an input, the output transistor
Q2 from I/O0 or the output transistors Q1 and Q2 from any
of the I/O1 to I/O7 are off for that particular I/O. If the I/O
pin is configured as an output, the open drain output stage of
I/O0 or the push−pull output stage of I/O1 to I/O7 is enabled.
Care should be taken if an external voltage is applied to an
I/O pin configured as an output due to the low impedance
paths that exist between the pin and either VDD or VSS.
2.5
IOL = 3 mA @ VOLmax
2.0
1.5
1.0
0.5
0
2.0 2.4 2.8 3.2 3.6 4.0 4.4 4.8 5.2 5.6
VDD, SUPPLY VOLTAGE (V)
Figure 7. Minimum RP Value vs. Supply
Voltage
8
Fast Mode I2C Bus / tr max − 300 ns
7
6
5
4
3
2
1
0
0 50 100 150 200 250 300 350 400 450
CBUS, BUS CAPACITANCE (pF)
Figure 8. Maximum RP Value vs. Bus
Capacitance
13. According to the Fast Mode I2C bus specification, for bus capacitance up to 200 pF, the pull up device can be a resistor. For bus loads between
200 pF and 400 pF, the pull−up device can be a current source (Imax = 3 mA) or a switched resistor circuit.
http://onsemi.com
8