CAT9557 Datasheet, PDF (2/17 Pages) ON Semiconductor – 8-Bit I2C-Bus and SMBus I/O Port

CAT9557
SOIC
TSSOP
TQFN
SCL 1
SDA 2
A0 3
A1 4
A2 5
IO0 6
IO1 7
16 V_DD
15 RESET
14 IO7
13 IO6
12 IO5
11 IO4
10 IO3
SCL 1
SDA 2
A0 3
A1 4
A2 5
IO0 6
IO1 7
V_SS
8
16
15
14
9557 ₁₃
AAAA ₁₂
*YWW
11
10
9
terminal 1
index area
V_DD
RESET
IO7
IO6
IO5
IO4
IO3
IO2
A0 1
A1 2
A2 3
IO0 4
9557
AAAA
*YWW
12 IO7
11 IO6
10 IO5
9 IO4
V_SS 8
9 IO2
Transparent top view
Special Marking Notes
*:
Assembly Location Code
4:
NiPdAu Lead Finish
B:
Product Revision fixed as “B”
CAT9557W: Product Code
I:
Temperature Range (Industrial)
Y:
Production Year (Last Digit)
M:
Production Month (One Digit):
1−9, (Jan−Sep), O, N, D (Oct−Dec)
AAAA: Last 4 Characters of Assembly Lot Number
Special Marking Notes
9557:
AAAA:
*:
Y:
WW:
Product Code
Last 4 Characters of Assembly Lot Number
Assembly Location Code
Production Year (Last Digit)
Production Week (Two Digits)
Pb−free Microdot
Figure 1. Pin Connections
Table 1. PIN FUNCTION DESCRIPTION
Pin No (SO16, TSSOP16)
Pin No (TQFN16)
Pin Name
Description
1
15
SCL
Serial Clock Line
2
16
SDA
Serial Data Line
3
1
A0
Address Input 0
4
2
A1
Address Input 1
5
3
A2
Address Input 2
6
4
IO0
Input/Output 0 (open−drain)
7
5
IO1
Input/Output 1
8
6 (Note 1)
VSS
Supply Ground
9
7
IO2
Input/Output 2
10
8
IO3
Input/Output 3
11
9
IO4
Input/Output 4
12
10
IO5
Input/Output 5
13
11
IO6
Input/Output 6
14
12
IO7
Input/Output 7
15
13
RESET
Active LOW Reset Input
16
14
V_DD
Supply Voltage
1. TQFN package die supply ground is connected to both the VSS pin and the exposed center pad. The VSS pin must be connected to the
supply ground for proper device operation. For enhanced thermal, electrical, and board−level performance, the exposed pad needs to be
soldered to the board using a corresponding thermal pad on the board, and for proper heat conduction through the board thermal vias need
to be incorporated in the PCB in the thermal pad region.
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