LC88FC2F0B Datasheet, PDF (41/47 Pages) ON Semiconductor – 16-bit Microcontroller 384K-byte Flash ROM / 24Kbyte RAM / 100-pin

LC88FC2F0B
■ Characteristics of a Sample Main System Clock Oscillation Circuit
Given below are the characteristics of a sample main system clock oscillation circuit that are measured using a
Our Company -designated oscillation characteristics evaluation board and external components with circuit
constant values with which the oscillator vendor confirmed normal and stable oscillation.
■ Table 1 Characteristics of a Sample Main System Clock Oscillator Circuit with a Ceramic Resonator
Nominal
Frequency
Vendor Name
Resonator
Circuit Constant
C3 C4 Rf Rd2
Operating
Voltage
Range
Oscillation
Stabilization Time
Typ max
Remarks
[pF] [pF] [] []
[V]
[ms] [ms]
12 MHz
CSTCE12M0G52-R0 (10) (10) OPEN 330 2.2 to 3.6 0.02
0.2
C1, C2
integrated type
MURATA CSTCE10M0G52-R0 (10) (10) OPEN 680 2.2 to 2.6 0.02
10 MHz
CSTLS10M0G53-B0 (15) (15) OPEN 680 2.2 to 3.6 0.02
0.2
C1, C2
integrated type
0.2
C1, C2
integrated type
The oscillation stabilization time refers to the time interval that is required for the oscillation to get stabilized
after VDD goes above the lower limit level of the operating voltage range (see Figure 4)
■ Characteristics of a Sample Subsystem Clock Oscillator Circuit
Given below are the characteristics of a sample subsystem clock oscillation circuit that are measured using a
Our Company -designated oscillation characteristics evaluation board and external components with circuit
constant values with which the oscillator vendor confirmed normal and stable oscillation.
■ Table 2 Characteristics of a Sample Subsystem Clock Oscillator Circuit with a Crystal Resonator
Nominal
Frequency
Circuit Constant
Vendor Name Resonator
C3 C4
Rf2 Rd2
[pF] [pF] [] []
Operating Voltage
Range
[V]
Oscillation
Stabilization Time
typ
max
[s]
[s]
Remarks
32.768 kHz
EPSON
TOYOCOM
MC-306
10
10
Open 330K
2.2 to 3.6
1.0
3.0
CL=7.0pF
The oscillation stabilization time refers to the time interval that is required for the oscillation to get stabilized
after the instruction for starting the subclock oscillator circuit is executed plus the time interval that is required
for the oscillation to get stabilized after the HOLD mode is released (see Figure 4).
Note: The traces to and from the components that are involved in oscillation should be kept as short as possible
as the oscillation characteristics are affected by their trace pattern.
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