LC88FC2F0B Datasheet, PDF (22/47 Pages) ON Semiconductor – 16-bit Microcontroller 384K-byte Flash ROM / 24Kbyte RAM / 100-pin

LC88FC2F0B
2-1. SIO1 Serial Input/Output Characteristics (Wakeup Function Disabled) (Note 4-3-1)
Parameter
Period
Symbol
tSCK (4)
Applicable
Pin/Remarks
Conditions
SCK1 (P45) ^ See Fig. 6.
Specification
VDD [V] min
typ
max
4
Low level
tSCKL (4)
pulse width
2
High level
tSCKH (4)
2
pulse width _{tSCKHA (4)}
 _{Automatic communication}
mode
 _{See Fig. 6.}
6
2.7 to 3.6
tSCKHBSY
 _{Automatic communication}
(4a)
mode
23
 _{See Fig. 6.}
tSCKHBSY
 _{Mode other than automatic}
(4b)
communication mode
4
 _{See Fig. 6.}
Period
tSCK (5)
SCK1 (P45) ^ CMOS output selected
 _{See Fig. 6.}
4
Low level
tSCKL (5)
pulse width
1/2
High level
tSCKH (5)
pulse width
1/2
tSCKHA (5)
 _{Automatic communication}
mode
 _{CMOS output selected}
 _{See Fig. 6.}
2.7 to 3.6
6
tSCKHBSY
 _{Automatic communication}
(5a)
mode
 _{CMOS output selected}
4
23
 _{See Fig. 6.}
tSCKHBSY
 _{Mode other than automatic}
(5b)
communication mode
4
 _{See Fig. 6.}
Data setup time tsDI (3)
SI1 (P44), ^ Specified with respect to
SB1 (P44) rising edge of SIOCLK
0.03
Data hold time
thDI (3)
 _{See Fig. 6.}
2.7 to 3.6
0.03
unit
tCYC
tSCK
tCYC
Output delay tdD0 (4)
time
SO1 (P43), ^ (Note 4-3-2)
SB1 (P44)
1tCYC
+0.05
s
tdDO (5)
 _{(Note 4-3-2)}
2.7 to 3.6
1tCYC
+0.05
Note 4-3-1: These specifications are theoretical values. Add margin depending on its use.
Note 4-3-2: Specified with respect to the falling edge of SIOCLK. Specified as the interval up to the time an
output change begins in the open drain output mode. See Fig. 6.
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