LC88FC2F0B Datasheet, PDF (30/47 Pages) ON Semiconductor – 16-bit Microcontroller 384K-byte Flash ROM / 24Kbyte RAM / 100-pin

LC88FC2F0B
5-2. SMIIC1 I²C Mode Input/Output Characteristics
Parameter
Symbol
Applicable
Pin/Remarks
Conditions
VDD [V] min
Period
tSCL
SM1CK
 _{See Fig. 8.}
(PB4)
5
Low level tSCLL
pulse width
2.7 to 3.6 2.5
High level tSCLH
pulse width
2
Period
tSCLx
SM1CK
 _{Specified as interval up to}
(PB4)
time when output state starts
10
Low level tSCLLx
pulse width
changing.
2.7 to 3.6
High level tSCLHx
pulse width
SM0CK and SM0DA ^tsp
pins input spike
SM1CK (PB4) ^ See Fig. 8.
SM1DA (PB5)
2.7 to 3.6
suppression time
tBUF
SM1CK (PB4) ^ See Fig. 8.
SM1DA (PB5)
2.5
Bus release time
between start and
stop
Start/restart
condition hold
time
Restart condition
setup time
tBUFx
SM1CK (PB4) ^ Standard clock mode
SM1DA (PB5) ^ Specified as interval up to
time when output state starts _{2.7 to 3.6}
5.5
changing.
 _{High-speed clock mode}
 _{Specified as interval up to}
time when output state starts
1.6
changing.
tHD;STA SM1CK (PB4) ^ When SMIIC register
SM1DA (PB5) control bit,
I2CSHDS=0
2.0
 _{See Fig. 8.}
 _{When SMIIC register}
control bit
I2CSHDS=1
2.5
 _{See Fig. 8.}
tHD;STAx SM1CK (PB4) ^ Standard clock mode
2.7 to 3.6
SM1DA (PB5) ^ Specified as interval up to
time when output state starts
4.1
changing.
 _{High-speed clock mode}
 _{Specified as interval up to}
time when output state starts
1.0
changing.
tSU;STA SM1CK (PB4) ^ See Fig. 8.
SM1DA (PB5)
1.0
tSU;STAx SM1CK (PB4) ^ Standard clock mode
SM1DA (PB5) ^ Specified as interval up to
time when output state starts
changing.
2.7 to 3.6
5.5
 _{High-speed clock mode}
 _{Specified as interval up to}
time when output state starts
1.6
changing.
Specification
typ
max
unit
Tfilt
1/2
tSCL
1/2
1
Tfilt
Tfilt
μs
Tfilt
μs
Tfilt
μs
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