AMIS-30621 Datasheet, PDF (24/59 Pages) AMI SEMICONDUCTOR – LIN Microstepping Motordriver

AMIS−30621
In Stop mode 1 the motor is put in shutdown state. The
<UV2> flag is set. In case V_BB > UV1, AMIS−30621
accepts updates of the target position by means of the
reception of SetPosition, SetPositionShort and
GotoSecurePosition commands, only AFTER the
<UV2> flag is cleared by receiving a GetStatus or
GetFullStatus command.
In Stop mode 2 the motor is stopped immediately and put
in shutdown state. The <UV2> and <Steploss> flags are
set. In case V_BB > UV1, AMIS−30621 accepts updates of the
target position by means of the reception of
SetPosition,
SetPositionShort
and
GotoSecurePosition commands, only AFTER the
<UV2> and <Steploss> flags are cleared by receiving a
GetStatus or GetFullStatus command.
Important Notes:
• In the case of Stop mode 2, care needs to be taken
because the accumulated steploss can cause a
significant deviation between physical and stored actual
position.
• The SetDualPosition command will only be
executed after clearing the <UV2> and <Steploss>
flags.
• RAM reset occurs when V_DD < V_DDReset (digital POR
level).
OTP Register
OTP Memory Structure
The table below shows how the parameters to be stored in the OTP memory are located.
Table 17. OTP MEMORY STRUCTURE
Address
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0x00
OSC3
OSC2
OSC1
OSC0
IREF3
IREF2
IREF1
IREF0
0x01
1
TSD2
TSD1
TSD0
BG3
BG2
BG1
BG0
0x02
ADM
(HW2)
(HW1)
(HW0)
PA3
PA2
PA1
PA0
(Note 23)
(Note 23)
(Note 23)
0x03
Irun3
Irun2
Irun1
Irun0
Ihold3
Ihold2
Ihold1
Ihold0
(Note 24)
0x04
Vmax3
Vmax2
Vmax1
Vmax0
Vmin3
Vmin2
Vmin1
Vmin0
0x05
SecPos10 SecPos9
SecPos8
Shaft
Acc3
Acc2
Acc1
Acc0
0x06
SecPos7
SecPos6
SecPos5
SecPos4
SecPos3
SecPos2
SecPos1
SecPos0
0x07
StepMode1 StepMode0 LOCKBT
LOCKBG
23. Although not stored in the OTP memory the physical status of the hardware address input pins are returned by a read of the OTP contents
(GetOTPparam).
24. Note for product version AMIS30621C6217G and AMIS30621C6217RG the Ihold0 bit is programmed to ’1’.
Parameters stored at address 0x00 and 0x01 and bit
<LOCKBT> are already programmed in the OTP memory at
circuit delivery. They correspond to the calibration of the
circuit and are just documented here as an indication.
Each OTP bit is at ‘0’ when not zapped. Zapping a bit will
set it to ‘1’. Thus only bits having to be at ‘1’ must be zapped.
Zapping of a bit already at ‘1’ is disabled. Each OTP byte
will be programmed separately (see command
SetOTPparam). Once OTP programming is completed,
bit <LOCKBG> can be zapped to disable future zapping,
otherwise any OTP bit at ‘0’ could still be zapped by using
a SetOTPparam command.
Table 18. OTP OVERWRITE PROTECTION
Lock Bit
LOCKBT (factory zapped before delivery)
Protected
Bytes
0x00 to 0x01
LOCKBG
0x00 to 0x07
The command used to load the application parameters via
the LIN bus in the RAM prior to an OTP Memory
programming is SetMotorParam. This allows for a
functional verification before using a SetOTPparam
command to program and zap separately one OTP memory
byte. A GetOTPparam command issued after each
SetOTPparam command allows verifying the correct byte
zapping.
Note: zapped bits will really be “active” after a
GetOTPparam or a ResetToDefault command or
after a power−up.
Application Parameters Stored in OTP Memory
Except for the physical address <PA[3:0]> these
parameters, although programmed in a non−volatile
memory can still be overridden in RAM by a LIN writing
operation.
PA[3:0] In combination with HW[2:0] and ADM bit,
it forms the physical address AD[6:0] of the
stepper−motor. Up to 128 stepper−motors can
theoretically be connected to the same LIN bus.
ADM Addressing mode bit enabling to swap the
combination of OTP memory bits PA[3:0] with
hardwired address bits HW[2:0] to form the
physical address AD[6:0] of the stepper motor.
http://onsemi.com
24