AMIS-30621 Datasheet, PDF (21/59 Pages) AMI SEMICONDUCTOR – LIN Microstepping Motordriver

DriveHS
AMIS−30621
Tsw = 1024 ms
512 ms
t
Tsw_on = 64 ms
DriveLS
t
“R”−Comp
R_th
t
SWI_Cmp
60 ms
t
ESW
0
1
1
1
t
ActPos
t
Figure 13. Simplified Timing Diagram Showing the Change in States for SWI Comparator
Main Control and Register, OTP memory + ROM
Power−up Phase
Power up phase of the AMIS−30621 will not exceed
10ms. After this phase, the AMIS−30621 is in standby
mode, ready to receive LIN messages and execute the
associated commands. After power−up, the registers and
flags are in the reset state, while some of them are being
loaded with the OTP memory content (see Table 19).
Reset
After power−up, or after a reset occurrence (e.g. a
micro−cut on pin V_BB has made V_DD to go below V_DDReset
level), the H−bridges will be in high−impedance mode, and
the registers and flags will have a predetermined value. This
is documented in Tables 19 and 20.
Soft Stop
A soft stop is an immediate interruption of a motion, but
with a deceleration phase. At the end of this action, the
register <TagPos> is loaded with the value contained in
register <ActPos>, see Table 19). The circuit is then ready
to execute a new positioning command, provided thermal
and electrical conditions allow for it.
Sleep Mode
When entering sleep mode, the stepper−motor can be
driven to its secure position. After which, the circuit is
completely powered down, apart from the LIN receiver,
which remains active to detect a dominant state on the bus.
In case sleep mode is entered while a motion is ongoing, a
transition will occur towards secure position as described in
Positioning and Motion Control provided <SecPos> is
enabled. Otherwise, <SoftStop> is performed.
Sleep mode can be entered in the following cases:
• The circuit receives a LIN frame with identifier 0x3C
and first data byte containing 0x00, as required by LIN
specification rev 1.3. See also Sleep in the LIN
Application Command section.
• In case the LIN bus is and remains inactive (or is lost)
during more than 25000 time slots (1.30 s at
19.2 kbit/s), a time−out signal switches the circuit to
sleep mode.
The circuit will return to normal mode if a valid LIN frame
is received (this valid frame can be addressed to another
slave).
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