82V3001A Datasheet, PDF (24/28 Pages) Integrated Device Technology – WAN PLL WITH SINGLE REFERENCE INPUT

IDT82V3001A
6
TIMING CHARACTERISTICS
WAN PLL WITH SINGLE REFERENCE INPUT
Table - 17 Timing Parameter Measurement Voltage Levels
Parameter
Description
V_T
Threshold Voltage
V_HM
Rise and Fall Threshold Voltage High
V_LM
Rise and Fall Threshold Voltage Low
CMOS
0.5V_DDD
0.7V_DDD
0.3V_DDD
Notes:
1. Voltages are with respect to ground (VSS) unless otherwise stated.
2. Supply voltage and operating temperature are as per Recommended Operating Conditions.
3. Timing for input and output signals is based on the worst case result of the CMOS thresholds
ALL SIGNALS
Timing Reference Points
t_IRF,t_ORF
Table - 18 Input / Output Timing
Parameter
Description
t_RW
t_IRF
t_R8D
t_R15D
t_R2D
t_F0D
t_F16S
t_F16H
t_C15D
t_C3D
t_C6D
t_C2D
t_C4D
t_C8D
t_C16D
t_C32D
t_TSPD
t_RSPD
t_C15W
t_C3W
t_C6W
Reference input pulse width high or low
Reference input rise or fall time
8 kHz reference input to F8o delay
1.544 MHz reference input to F8o delay
2.048 MHz reference input to F8o delay
F8o to F0o delay
F16o setup to C16o falling
F16o hold to C16o falling
F8o to C1.5o delay
F8o to C3o delay
F8o to C6o delay
F8o to C2o
F8o to C4o
F8o to C8o delay
F8o to C16o delay
F8o to C32o delay
F8o to TSP delay
F8o to RSP delay
C1.5o pulse width high or low
C3o pulse width high or low
C6o pulse width high or low
Min
Typ
Max
Units
51
ns
10
ns
8
ns
332
ns
253
ns
118
121
124
ns
25
40
ns
25
40
ns
-3
0
+3
ns
-3
1.6
+3
ns
-3
1.6
+3
ns
-2
0
+2
ns
-2
0
+2
ns
-2
0
+2
ns
-2
0
+2
ns
-2
2
+2
ns
-3
0
+3
ns
-3
0
+3
ns
323
ns
161
ns
82
ns
Units
V
V
V
VVV_HTLMM
t_IRF,t_ORF
Test Conditions
TIMING CHARACTERISTICS
24
November 14, 2012