PHU78NQ03LT Datasheet, PDF (9/12 Pages) NXP Semiconductors – N-channel TrenchMOSTM logic level FET

NXP Semiconductors
7. Package outline
Plastic single-ended package (IPAK); 3 leads (in-line)
PHU78NQ03LT
N-channel TrenchMOS logic level FET
SOT533
E
E₁
D₁
D₂
A
A₁
mounting
base
L₁
Q
L
1
2
3
e₁
b
wM
c
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT A A₁ b
c D₁ D2 E E₁
e
e₁
L
L₁ ⁽²⁾
max
Q
w
mm
2.38
2.22
0.93 0.89
0.46 0.71
0.56 1.10 6.22
0.46 0.96 5.98
6.73
6.47
5.21 4.57 2.285
5.00 BSC⁽¹⁾ BSC⁽¹⁾
9.6
9.2
2.7
1.1
1.0
0.3
Notes
1. Basic spacing between centers.
2. Terminal dimensions are uncontrolled within zone L₁.
OUTLINE
VERSION
IEC
REFERENCES
JEDEC
JEITA
SOT533
TO-251
EUROPEAN
PROJECTION
Fig 13. Package outline SOT533 (IPAK)
ISSUE DATE
05-02-11
06-02-14
PHU78NQ03LT_6
Product data sheet
Rev. 06 — 15 June 2009
© NXP B.V. 2009. All rights reserved.
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