PHU78NQ03LT Datasheet, PDF (7/12 Pages) NXP Semiconductors – N-channel TrenchMOSTM logic level FET

NXP Semiconductors
PHU78NQ03LT
N-channel TrenchMOS logic level FET
30
V_GS (V) =
R_DSon
(mΩ)
20
10
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3.6
4
4.5
5
6
8
10
0
0
20
40
60
80
I_D (A)
03af18
2
a
1.5
1
0.5
0
-60
0
60
120
180
T_j (°C)
Fig 7. Drain-source on-state resistance as a function
of drain current; typical values
Fig 8. Normalized drain-source on-state resistance
factor as a function of junction temperature
10
V_GS
(V)
8
I_D = 25 A
T_j = 25 °C
6
12 V
4
2
0
0
10
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V_DD = 19 V
20
30
Q_G (nC)
V_DS
I_D
V_GS(pl)
V_GS(th)
V_GS
Q_GS1 Q_GS2
Q_GS
Q_GD
Q_G(tot)
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Fig 10. Gate charge waveform definitions
Fig 9. Gate-source voltage as a function of gate
charge; typical values
PHU78NQ03LT_6
Product data sheet
Rev. 06 — 15 June 2009
© NXP B.V. 2009. All rights reserved.
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