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| PHU78NQ03LT Datasheet, PDF (4/12 Pages) NXP Semiconductors – N-channel TrenchMOSTM logic level FET | |||
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NXP Semiconductors
PHU78NQ03LT
N-channel TrenchMOS logic level FET
103
ID
(A)
102
Limit RDSon = VDS / ID
DC
10
1
1
10
tp = 10 µs
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100 μs
1 ms
10 ms
102
VDS (V)
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage
5. Thermal characteristics
Table 5.
Symbol
Rth(j-mb)
Rth(j-a)
Thermal characteristics
Parameter
Conditions
thermal resistance from see Figure 4
junction to mounting
base
thermal resistance from vertical in free air
junction to ambient
Min Typ Max Unit
-
-
1.4 K/W
-
70
-
K/W
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10
Zth(j-mb)
(K/W)
1
δ =0.5
0.2
0.1
10-1 0.05
0.02
P
δ = tp
T
single pulse
tp
t
10-2
10-5
10-4
10-3
10-2
T
10-1
1
tp (s)
Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration
PHU78NQ03LT_6
Product data sheet
Rev. 06 â 15 June 2009
© NXP B.V. 2009. All rights reserved.
4 of 12
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