TDA8262HN Datasheet, PDF (7/30 Pages) NXP Semiconductors – Fully integrated satellite tuner

Philips Semiconductors
TDA8262HN
Fully integrated satellite tuner
RF
input
TDA8262HN
RF loop-through
16 MHz
TDA8262HN
16 MHz
RF output
TDA10093
MPEG2
streams
I ² C-bus
001aab033
Fig 4. Tuner configuration for two channels (watch and record)
10. Functional description
The TDA8262HN contains the core of the RF analog part of a digital satellite receiver. The
signal coming from the LNB is coupled to the RF inputs. The internal circuitry performs the
Zero-IF quadrature frequency conversion and two in-phase (IP/IN) and two quadrature
(QP/QN) output signals can directly be used to feed a Satellite Demodulator and Decoder
circuit (SDD). Low pass filter cut-off frequency can be adjusted from 5 MHz to 36 MHz in
32 steps. This allows a large flexibility in the SDD input. 10 gain values are present at
output amplifier to compensate cut-off frequency adjustment and single output
application.
The IC gain controlled amplifier before the mixer is controlled by the SDD through pin
AGC.
An input level detector gives the wide band RF level. This information is available through
I²C-bus in read mode.
The internal loop controls a fully integrated VCO, to cover the range from 950 MHz to
2175 MHz. This VCO provides both in phase and quadrature signals to drive the two
mixers.
The output of the 15-bit programmable divider passes through the phase comparator
where it is compared in both phase and frequency to the comparison frequency (f_comp).
This f_comp is derived from the signal present at the XT/XTN pins (f_XTAL), divided down in
the reference divider. The buffered signal on pin XTOUT is able to drive the crystal
frequency input of the SDD, which saves a crystal in the application.
9397 750 13194
Product data sheet
Rev. 01 — 14 December 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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