TDA8262HN Datasheet, PDF (10/30 Pages) NXP Semiconductors – Fully integrated satellite tuner

Philips Semiconductors
TDA8262HN
Fully integrated satellite tuner
11.6 I²C-bus table in write mode (default at POR)
Table 8: I²C-bus write mode map (default at POR) ^[1]
Subaddress MSB
LSB
(hex)
7
6
5
4
3
2
1
0
0X
0
0
0
0
1
0
0
1
1X
0
0
1
0
0
0
0
0
2X
0
0
0
0
0
0
0
1
3X
0
0
0
0
0
0
0
1
4X
0
0
0
0
0
-
-
-
5X
0
0
0
0
-
-
-
0
6X
0
0
X
X
0
X
0
-
7X
1
0
0
-
-
-
0
0
8X
0
-
-
0
0
0
0
-
9X
0
0
0
0
-
-
-
-
[1] X means don’t care.
11.7 Bit description I²C-bus write mode
Table 9: Power-down section
Bit
Description
PDPLL
power-down of all the synthesizer part
PDZIF
power-down of all signal decoding part except
LNA, RSSI and loop-through
PDLOOPT power-down of the loop-through
PDXTOUT power-down of the XTOUT output
PDRSSI
power-down of the input level detector (RSSI)
PDLNA
power-down of the low noise amplifier
PDXTAL
power-down of the crystal oscillator
TEST1
used for test purposes only
State
0 = function on; 1 = function off
0 = function on; 1 = function off
0 = function on; 1 = function off
0 = function on; 1 = function off
0 = function on; 1 = function off
0 = function on; 1 = function off
0 = function on; 1 = function off
must be logic 1
Table 10: Reference divider range; bits R[2:0]
These bits select the ratio between the comparison frequency and the crystal frequency.
R2
R1
R0 Decimal Comparison frequency
0
0
0
0
2 MHz
0
0
1
1
1 MHz
0
1
0
2
500 kHz
0
1
1
3
250 kHz
1
0
0
4
125 kHz
1
0
1
5
125 kHz
1
1
0
6
125 kHz
1
1
1
7
125 kHz
9397 750 13194
Product data sheet
Rev. 01 — 14 December 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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