TDA8262HN Datasheet, PDF (20/30 Pages) NXP Semiconductors – Fully integrated satellite tuner

Philips Semiconductors
TDA8262HN
Fully integrated satellite tuner
Table 36:
Symbol
PORT1
Internal circuitry …continued
Pin
Equivalent circuit
32
PORT1
GND(DIG)
500 Ω
CMOS logic
test
test
001aaa996
13. Limiting values
Table 37: Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). ^[1]
Symbol Parameter
Conditions
Min
V_CC
supply voltage
V_I
input voltage
−0.5
pins SDA, SCL,
−0.3
PORT1 and PORT0
pin RFIN
−0.3
all other pins
T_amb
T_stg
ambient temperature
storage temperature
V_CC < 3.3 V
V_CC ≥ 3.3 V
−0.3
−0.3
−20
−40
T_j
junction temperature
-
t_sc
short circuit time
[2] _-
V_esd
electrostatic discharge human body model
voltage
pin PORT0 (pin 8)
-
all other pins
[3] _-
machine model
[4] _-
Max
Unit
+3.6
V
+5.5
V
V_CC − 0.3 V
V_CC + 0.3 V
+3.6
V
+85
°C
+125
°C
125
°C
10
s
±1 000
V
±2 000
V
±200
V
[1] Maximum ratings cannot be exceeded, not even momentarily without causing irreversible damages to the
IC. Maximum ratings cannot be accumulated.
[2] Each pin to V_CC or GND; except RFIN pin which should never exceed V_CC − 0.3 V.
[3] Test in accordance with JEDEC specification EIA/JESD22-114B.
[4] Test in accordance with JEDEC specification EIA/JESD22-A115-A.
14. Thermal characteristics
Table 38: Thermal characteristics
Symbol Parameter
Conditions
R_th(j-a)
thermal resistance JEDEC 4 layer test board with 9
junction to ambient thermal vias (exposed die pad
soldered on board)
Typ
Unit
43
K/W
9397 750 13194
Product data sheet
Rev. 01 — 14 December 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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