PSMN3R5-30LL Datasheet, PDF (7/13 Pages) NXP Semiconductors – N-channel 30 V 3.6 mΩ logic level MOSFET

NXP Semiconductors
10^-1
I_D
(A)
10^-2
003aab271
min
typ
max
10^-3
10^-4
10^-5
10^-6
0
1
2 V_GS (V) 3
PSMN3R5-30LL _a
3.2
2.4
N-channel
30DVRA3F.T6DmRADΩ^{FRTAloDFTRgADicF}₀^R_0TDA3l_aDeRFaTRAv_d7AFDe7^TFRl_{4TADMDFRTORDAARFDSTFARFTFADTEDFRTRDATARDFTFDARTRFADTADFRTFRDATADRF}
1.6
0.8
0
-60
0
60
120
180
T_j (°C)
Fig 10. Sub-threshold drain current as a function of
gate-source voltage
20
R_DSon
(mΩ)
15
10
5
0
0
003aae147
V_GS (V) = 3
3.5
4.5
10
10
20
30
40
I_D (A)
Fig 11. Normalized drain-source on-state resistance
factor as a function of junction temperature
V_DS
I_D
V_GS(pl)
V_GS(th)
V_GS
Q_GS1 Q_GS2
Q_GS
Q_GD
Q_G(tot)
003aaa508
Fig 13. Gate charge waveform definitions
Fig 12. Drain-source on-state resistance as a function
of drain current; typical values
PSMN3R5-30LL_1
Objective data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 18 February 2010
© NXP B.V. 2010. All rights reserved.
7 of 13