PSMN3R5-30LL Datasheet, PDF (6/13 Pages) NXP Semiconductors – N-channel 30 V 3.6 mΩ logic level MOSFET

NXP Semiconductors
4000
C
(pF)
3000
2000
003aae145
C_iss
C_rss
1000
0
0
2.5
5
7.5
10
V_GS (V)
PSMN3R5-30LL ₂₅
R_DSon
(mΩ)
20
15
N-channel
30DVRA3F.T6DmRADΩ^{FRTAloDFTRgADicFR}_0T0^DAl_3DeRFaaTRAv_eAF1De4^TFRl_{8TADMDFRTORDAARFDSTFARFTFADTEDFRTRDATARDFTFDARTRFADTADFRTFRDATADRF}
10
5
0
0
4
8
12
16
20
V_GS(V)
Fig 6. Input and reverse transfer capacitances as a
Fig 7. Drain-source on-state resistance as a function
function of gate-source voltage; typical values
of gate-source voltage; typical values
50
I_D
(A)
40
10 4.5 3.5
003aae142
3
30
2.8
20
10
0
0
2.6
V_GS(V) = 2.4
0.25
0.5
0.75
1
V_DS(V)
3
VGS (th)
(V)
2
1
max
typ
min
003aac337
0
-6 0
0
60
120
180
Tj (°C)
Fig 8. Output characteristics: drain current as a
Fig 9. Gate-source threshold voltage as a function of
function of drain-source voltage; typical values
junction temperature
PSMN3R5-30LL_1
Objective data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 18 February 2010
© NXP B.V. 2010. All rights reserved.
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