SAF3560 Datasheet, PDF (6/20 Pages) NXP Semiconductors – Terrestrial digital radio processor Providing new data services

NXP Semiconductors
6. Pinning information
6.1 Pinning
SAF3560
Terrestrial digital radio processor
SAF3560
1
108
36
73
Fig 3. Pin configuration (HLQFP144)
001aah072
Table 4. Pin allocation table (HLQFP144)
Pin Symbol
Pin Symbol
Pin Symbol
1 CLKOUT
2 RESET_N
3 I2C1_SCL
5 I2C1_DA
9 I2C2_DA
6
V_DDD(MC)(3V3)
10 SPI1_SO
7 I2C2_SCL
11 SPI1_SI
13 SPI1_SS_N
17 SPI2_MO
14 V_DDD(C)(1V2)
18 SPI2_SCLK
15 V_DDD(MC)(3V3)
19 SPI2_SS1_N
21 V_DDD(MC)(3V3)
25 UART_RD
29 UART_CTS
22 SPI2_SS3_N
26 UART_RTS
30 SPI3_MISO
23 SPI2_SS4_N
27 V_DDD(C)(1V2)
31 SPI3_MOSI
33 SPI3_SS1_N
37 GPIO1
34 V_{DDD(DAB)(3V3)}
38 GPIO2
35 SPI3_SS2_N
39 GPIO3
41 -^[1]
45 -
42 V_{DDD(DAB)(3V3)}
46 -
43 -
47 -
49 -
50 -
51 -
53 -
54 -
55 BB1_I2S_BCK
57 BB1_I2S_I
58 BB1_I2S_Q
59 BB2_I2S_BCK
61 BB2_I2S_I
65 HBCKOUT
62 BB2_I2S_Q
66 I2S1_O_BCK
63 V_DDD(C)(1V2)
67 I2S1_O_WS
69 BLEND
73 I2S3_O_SD/
SPDIF_O
70 V_{DDD(MEM)(1V2)}
74 I2S_I_WS
71 V_{DDD(DSP)(3V3)}
75 I2S_I_BCK
77 SDRAM_DIO0 78 SDRAM_DIO1 79 SDRAM_DIO2
81 SDRAM_DIO3 82 SDRAM_DIO4 83 SDRAM_DIO5
85 V_{DDD(SDRAM)(3V3)} 86 SDRAM_DIO7 87 SDRAM_DIO8
89 SDRAM_DIO10 90 V_{DDD(SDRAM)(3V3)} 91 V_DDD(C)(1V2)
Pin Symbol
4 I2C1_SDA
8 I2C2_SDA
12 SPI1_SCLK
16 SPI2_MI
20 SPI2_SS2_N
24 UART_TD
28 V_DDD(MC)(3V3)
32 SPI3_SCLK
36 GPIO0
40 GPIO4
44 -
48 -
52 -
56 BB1_I2S_WS
60 BB2_I2S_WS
64 V_{DDD(DSP)(3V3)}
68 I2S1_O_SD
72 I2S2_O_SD
76 I2S_I_SD
80 V_{DDD(SDRAM)(3V3)}
84 SDRAM_DIO6
88 SDRAM_DIO9
92 SDRAM_DIO11
SAF3560_SDS
Product short data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 03 — 15 September 2010
© NXP B.V. 2010. All rights reserved.
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