SAF3560 Datasheet, PDF (13/20 Pages) NXP Semiconductors – Terrestrial digital radio processor Providing new data services

NXP Semiconductors
SAF3560
Terrestrial digital radio processor
7. Limiting values
Table 16. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Min
V_{DDA(OSC)(1V2)} oscillator analog supply voltage (1.2 V)
−0.5
V_{DDA(PLL)(1V2)}
PLL analog supply voltage (1.2 V)
−0.5
V_DDD(C)(1V2)
core digital supply voltage (1.2 V)
−0.5
V_{DDD(DAB)(3V3)} DAB digital supply voltage (3.3 V)
−0.5
V_{DDD(DSP)(3V3)} DSP digital supply voltage (3.3 V)
−0.5
V_{DDD(JTAG)(3V3)} JTAG digital supply voltage (3.3 V)
−0.5
V_DDD(MC)(3V3)
microcontroller digital supply voltage (3.3 V)
−0.5
V_{DDD(SDRAM)(3V3)} SDRAM digital supply voltage (3.3 V)
−0.5
V_{DDD(MEM)(1V2)} memory digital supply voltage (1.2 V)
−0.5
T_amb
ambient temperature
−40
T_stg
storage temperature
−65
V_ESD
electrostatic discharge voltage
human body model
[1] _-
charged device model ^[2]
corner pins
-
other pins
-
I_lu
latch-up current
all supply voltages
below the maximum
values listed in this
table
[2] _−100
[1] Class 2 according to JEDEC JESD22-A114.
[2] According to AEC-Q100-G.
Max Unit
+1.7 V
+1.7 V
+1.7 V
+3.9 V
+3.9 V
+3.9 V
+3.9 V
+3.9 V
+1.7 V
+85
°C
+150 °C
±2000 V
±750 V
±500 V
+100 mA
8. Thermal characteristics
The SAF3560 has no special thermal requirements. The backside contact is needed for
electrical reasons. For soldering considerations, see Section 10.
Table 17.
Symbol
R_th(j-a)
Thermal characteristics
Parameter
thermal resistance from junction
to ambient
Conditions
in free air
Typ
[1] _26.3
Unit
K/W
[1] The overall R_th(j-a) is based on JEDEC conditions and can vary depending on the board layout. To minimize
the effective R_th(j-a) all power and ground pins must be connected to the power and ground layers directly.
An ample amount of copper area directly under the SAF3560 with a number of through-hole plating, which
connect to the ground layer (four-layer board: second layer), can also reduce the effective R_th(j-a). Do not
use any solder-stop varnish under the chip. In addition the use of soldering glue with a high thermal
conductance after curing is recommended.
SAF3560_SDS
Product short data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 03 — 15 September 2010
© NXP B.V. 2010. All rights reserved.
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