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SAF3560 Datasheet, PDF (10/20 Pages) NXP Semiconductors – Terrestrial digital radio processor Providing new data services
NXP Semiconductors
SAF3560
Terrestrial digital radio processor
Table 9. Pin description (SDRAM interface) …continued
Symbol
Pin
Type[1] Description
SDRAM_AO5
117
OZU address output bit 5
SDRAM_AO4
115
OZU address output bit 4
SDRAM_AO3
114
OZU address output bit 3
SDRAM_AO2
113
OZU address output bit 2
SDRAM_AO1
111
OZU address output bit 1
SDRAM_AO0
110
OZU address output bit 0
Control interface
SDRAM_BA1
104
OZU bit 1 of bank address output
SDRAM_BA0
103
OZU bit 0 of bank address output
SDRAM_CAS_N 108
OZU column address selector output (active LOW)
SDRAM_CLK
127
OZU clock output
SDRAM_CLKE 109
OZU clock enable output
SDRAM_CLKIN 128
IZU
clock input for re-synchronization
SDRAM_CS_N 105
OZU chip select output (active LOW)
SDRAM_DQM1 100
OL
MSByte of data qualifier mask output
SDRAM_DQM0 99
OL
LSByte of data qualifier mask output
SDRAM_RAS_N 106
OZU row address selector output (active LOW)
SDRAM_WE_N 98
OZU write enable output (active LOW)
[1] Table 15 defines the pin type.
Table 10. Pin description (serial NOR-Flash interface)
Symbol
Pin
Type[1] Description
SPI2 interface
SPI2_MI
16
IZU
master input of second SPI interface
SPI2_MO 17
OZD master output of second SPI interface
SPI2_SCLK 18
OZU serial clock output of second SPI interface
SPI2_SS1_N 19
OZU slave select 1 output of second SPI interface (active LOW)
SPI2_SS2_N 20
OZU slave select 2 output of second SPI interface (active LOW)
SPI2_SS3_N 22
OZU slave select 3 output of second SPI interface (active LOW)
SPI2_SS4_N 23
OZU slave select 4 output of second SPI interface (active LOW)
[1] Table 15 defines the pin type.
SAF3560_SDS
Product short data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 03 — 15 September 2010
© NXP B.V. 2010. All rights reserved.
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