SAF3560 Datasheet, PDF (3/20 Pages) NXP Semiconductors – Terrestrial digital radio processor Providing new data services

NXP Semiconductors
SAF3560
Terrestrial digital radio processor
2.4 Other peripheral interfaces
„ Two I²C-bus interfaces
„ Three Serial Peripheral Interfaces (SPI)
„ One UART interface
„ Five individual GPIO pins for applications and diagnostics
„ One JTAG interface for diagnostics
2.5 Miscellaneous
„ One internal clock oscillator and two internal Phase-Locked Loops (PLL)
„ Powerful signal and audio processing core architecture
„ Qualified in accordance with AEC-Q100
3. Quick reference data
Table 1. Power supply characteristics
After power-up the SAF3560 needs a reset pulse for at least 2 ms.
Symbol
Parameter
Conditions
Supply voltages
V_{DDA(OSC)(1V2)} oscillator analog supply voltage (1.2 V)
V_{DDA(PLL)(1V2)}
PLL analog supply voltage (1.2 V)
V_DDD(C)(1V2)
core digital supply voltage (1.2 V)
V_{DDD(DAB)(3V3)} DAB digital supply voltage (3.3 V)
V_{DDD(DSP)(3V3)} DSP digital supply voltage (3.3 V)
V_{DDD(JTAG)(3V3)} JTAG digital supply voltage (3.3 V)
V_DDD(MC)(3V3)
microcontroller digital supply voltage (3.3 V)
V_{DDD(MEM)(1V2)} memory digital supply voltage (1.2 V)
V_{DDD(SDRAM)(3V3)} SDRAM digital supply voltage (3.3 V)
Supply currents
I_DD
supply current
all core related blocks ^[1]
all I/O related blocks ^[2]
Power dissipation
P_tot
total power dissipation
[1] Through pins V_{DDA(OSC)(1V2)}, V_{DDA(PLL)(1V2)}, V_DDD(C)(1V2) and V_{DDD(MEM)(1V2)}.
[2] Through pins V_{DDD(DAB)(3V3)}, V_{DDD(DSP)(3V3)}, V_{DDD(JTAG)(3V3)}, V_DDD(MC)(3V3) and V_{DDD(SDRAM)(3V3)}.
Min Typ
1.14 1.2
1.14 1.2
1.14 1.2
3.0 3.3
3.0 3.3
3.0 3.3
3.0 3.3
1.14 1.2
3.0 3.3
-
90
-
28
-
0.2
Max Unit
1.32 V
1.32 V
1.32 V
3.6 V
3.6 V
3.6 V
3.6 V
1.32 V
3.6 V
116 mA
37 mA
0.5 W
SAF3560_SDS
Product short data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 03 — 15 September 2010
© NXP B.V. 2010. All rights reserved.
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