MK82FN256VLL15 Datasheet, PDF (47/94 Pages) NXP Semiconductors – High performance ARM

Peripheral operating requirements and behaviors
All other ADC channels meet the 13-bit differential/12-bit single-ended accuracy
specifications.
3.5.1.1 ADC operating conditions
Table 37. ADC operating conditions
Symbol Description
V_DDA
ΔV_DDA
ΔV_SSA
V_REFH
Supply voltage
Supply voltage
Ground voltage
ADC reference
voltage high
V_REFL ADC reference
voltage low
V_ADIN Input voltage
Conditions
Absolute
Delta to V_DD (V_DD – V_DDA)
Delta to V_SS (V_SS – V_SSA)
• 16-bit differential mode
Min.
1.71
-100
-100
1.13
V_SSA
VREFL
• All other modes
VREFL
C_ADIN Input
• 8-bit / 10-bit / 12-bit
—
capacitance
modes
Typ.¹
—
0
0
V_DDA
V_SSA
—
—
4
Max.
3.6
+100
+100
V_DDA
V_SSA
31/32 ×
VREFH
VREFH
5
R_ADIN
R_AS
Input series
resistance
Analog source
resistance
(external)
13-bit / 12-bit modes
f_ADCK < 4 MHz
—
2
5
—
—
5
f_ADCK
C_rate
ADC conversion ≤ 13-bit mode
clock frequency
ADC conversion ≤ 13-bit modes
rate
No ADC hardware averaging
Continuous conversions
enabled, subsequent
conversion time
1.0
20.000
—
18.0
—
818.330
Unit
V
mV
mV
V
V
V
pF
kΩ
kΩ
MHz
ksps
Notes
2
2
3
4
5
1. Typical values assume V_DDA = 3.0 V, Temp = 25 °C, f_ADCK = 1.0 MHz, unless otherwise stated. Typical values are for
reference only, and are not tested in production.
2. DC potential difference.
3. This resistance is external to MCU. To achieve the best results, the analog source resistance must be kept as low as
possible. The results in this data sheet were derived from a system that had < 8 Ω analog source resistance. The
R_AS/C_AS time constant should be kept to < 1 ns.
4. To use the maximum ADC conversion clock frequency, CFG2[ADHSC] must be set and CFG1[ADLPC] must be clear.
5. For guidelines and examples of conversion rate calculation, download the ADC calculator tool.
Kinetis K82 Sub-Family, Rev.1, 09/2015.
47
Freescale Semiconductor, Inc.