MK82FN256VLL15 Datasheet, PDF (17/94 Pages) NXP Semiconductors – High performance ARM

General
Table 7. Power consumption operating behaviors (continued)
Symbol
I_{DD_LLS3}
Description
Low leakage stop mode current at 3.0 V
• @ 25°C
• @ 105°C
I_{DD_VLLS3}
Very low-leakage stop mode 3 current at 3.0 V
• @ 25°C
• @ 105°C
I_{DD_VLLS2}
Very low-leakage stop mode 2 current at 3.0 V
• @ 25°C
• @ 105°C
I_{DD_VLLS1}
Very low-leakage stop mode 1 current at 3.0 V
• @ 25°C
• @ 105°C
I_{DD_VLLS0}
Very low-leakage stop mode 0 current at 3.0 V with
POR detect circuit enabled
• @ 25°C
• @ 105°C
Min.
Typ.
Max.
Unit
—
7.78
13.16
μA
—
160.91 284.31
—
5.63
9.34
μA
—
117.89 202.55
—
3.13
4.04
μA
—
29.49
48.7
—
1.05
1.36
μA
—
15.31
18.56
—
0.62
0.84
μA
—
13.92
16.95
I_{DD_VLLS0}
Very low-leakage stop mode 0 current at 3.0 V with
POR detect circuit disabled
• @ 25°C
• @ 105°C
—
0.33
0.53
μA
—
13.42
16.44
I_{DD_VBAT} Average current with RTC and 32kHz disabled at 3.0
V
—
0.19
0.23
μA
• @ 25°C
• @ 105°C
—
2.56
3.71
I_{DD_VBAT}
Average current when CPU is not accessing RTC
registers @ 1.8V
• @ 25°C
• @ 105°C
—
0.57
0.64
μA
—
2.52
5.82
Notes
14
1. The analog supply current is the sum of the active or disabled current for each of the analog modules on the device.
See each module's specification for its supply current.
2. 120 MHz core and system clock, 60 MHz bus and FlexBus clock, and 24 MHz flash clock. MCG configured for PEE
mode. All peripheral clocks disabled.
3. 150 MHz core and system clock, 75 MHz bus and FlexBus clock, and 25 MHz flash clock. MCG configure for PEE
mode. All peripheral clocks enabled.
4. Max values are measured with CPU executing DSP instructions.
5. MCG configured for PEE mode.
6. 150 MHz core and system clock, 50 MHz bus and FlexBus clock, and 25 MHz flash clock. MCG configured for PEE
mode. All peripheral clocks disabled.
Kinetis K82 Sub-Family, Rev.1, 09/2015.
17
Freescale Semiconductor, Inc.