TDA8595 Datasheet, PDF (33/50 Pages) NXP Semiconductors – I2C-bus controlled 4 ´ 45 W power amplifier

NXP Semiconductors
TDA8595
I²C-bus controlled 4 × 45 W power amplifier
Table 17. Characteristics …continued
Refer to test circuit (see Figure 30) at V_P = V_P1 = V_P2 = 14.4 V; R_L = 4 Ω; f = 1 kHz; R_S = 0 Ω; normal mode; unless otherwise
specified. Tested at T_amb = 25 °C; guaranteed for T_amb = −40 °C to +105 °C.
Symbol
Parameter
Conditions
Min
Typ
Max Unit
Z_i
α_mute
V_o(mute)(RMS)
input impedance
mute attenuation
RMS mute output voltage
T_amb = −40 °C to +105 °C
T_amb = 0 °C to 105 °C
V_o / V_o(mute); V_i = 50 mV
V_i = 1 V (RMS);
filter 20 Hz to 22 kHz
50
70
95
kΩ
60
70
95
kΩ
80
92
-
dB
-
25
-
µV
B_p
power bandwidth
−1 dB
-
20 to -
Hz
20 000
[1] Operation above 16 V in a 2 Ω mode with reactive load can trigger the amplifier protection. The amplifier switches off and will restart
after 16 ms resulting in an ‘audio hole’.
[2] V_STB depends on the current into the STB pin: minimum = (1429 Ω × I_STB) + 5.4 V, maximum = (3143 Ω × I_STB) + 5.6 V.
[3] The times are specified without leakage current. For a leakage current of 10 µA on the SVR pin, the delta time is specified. If the
capacitor value on the SVR pin changes with ± 30 %, the specified time will also change with ± 30 %. The specified times include an
ESR of 15 Ω for the capacitor on the SVR pin.
[4] Standard I²C-bus specification: maximum LOW-level = 0.3 × V_DD, minimum HIGH-level = 0.7 × V_DD. To comply with 5 V and 3.3 V logic
the maximal LOW-level is defined by V_DD = 5 V and the minimum HIGH-level by V_DD = 3.3 V.
[5] For optimum channel separation (α_cs), supply voltage ripple rejection (SVRR) and common mode rejection ratio (CMRR), a resistor
R_ACGND = -^R-₄--^S- Ω should be in series with the ACGND capacitor.
12. Performance diagrams
10²
THD
(%)
10
001aad139
1
10^−1
(1)
10^−2
10^−3
10^−2
10^−1
1
(2)
(3)
10
10²
P_o (W)
V_P = 14.4 V.
(1) f = 10 kHz.
(2) f = 1 kHz.
(3) f = 100 Hz.
Fig 18. Total harmonic distortion as a function of output power; 4 Ω load
TDA8595_2
Product data sheet
Rev. 02 — 21 November 2007
© NXP B.V. 2007. All rights reserved.
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