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TDA8595 Datasheet, PDF (19/50 Pages) NXP Semiconductors – I2C-bus controlled 4 ´ 45 W power amplifier | |||
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NXP Semiconductors
TDA8595
I2C-bus controlled 4 à 45 W power ampliï¬er
The interpretation of line driver and normal mode DC load bit setting for AC load detection
is shown in Table 6.
Table 6.
DBx[D4]
0
1
AC load detection
Meaning (when IB1[D2] = 1)
no AC load detected
AC load detected
When bit IB1[D2] = 1, the AC load detection is enabled. The AC load detection can only
be performed after the ampliï¬er has completed its start-up cycle and will not conï¬ict with
the DC load detection.
20
|Zth(load)|
(â¦)
16
12
001aad177
(1)
8
(2)
4
0
0
1
2
3
4
5
VoM (V)
(1) IoM < 230 mA (no load detection level)
(2) IoM > 460 mA (load detection level)
Fig 14. AC load impedance as a function of peak output voltage
7.17 I2C-bus diagnostic readout
The diagnostic information of the ampliï¬er can be read via the I2C-bus. The I2C-bus bits
are set on a failure and will be reset with the I2C-bus read command. Even when the
failure is removed, the microprocessor will know what was wrong by reading the I2C-bus.
The consequence of this procedure is that old information is read during the I2C-bus
readout. Most actual information will be gathered after two successive read commands.
The DIAG pin will give actual diagnostic information (when selected). When a failure is
removed, the DIAG pin will be released instantly, independently of the I2C-bus latches.
TDA8595_2
Product data sheet
Rev. 02 â 21 November 2007
© NXP B.V. 2007. All rights reserved.
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