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| PSMN009-100P Datasheet, PDF (3/13 Pages) NXP Semiconductors – N-channel enhancement mode field-effect transistor | |||
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NXP Semiconductors
PSMN009-100P
N-channel TrenchMOS SiliconMAX standard level FET
4. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
Conditions
VDS
VDGR
VGS
ID
drain-source voltage
drain-gate voltage
gate-source voltage
drain current
Tj ⥠25 °C; Tj ⤠175 °C
Tj ⤠175 °C; Tj ⥠25 °C; RGS = 20 kâ¦
VGS = 10 V; Tmb = 100 °C; see Figure 1
VGS = 10 V; Tmb = 25 °C; see Figure 1;
see Figure 3
IDM
Ptot
Tstg
Tj
VGSM
peak drain current
total power dissipation
storage temperature
junction temperature
peak gate-source
voltage
tp ⤠10 µs; pulsed; Tmb = 25 °C; see Figure 3
Tmb = 25 °C; see Figure 2
pulsed; tp ⤠50 µs; Tj ⤠150 °C; δ = 25 %
Source-drain diode
IS
source current
ISM
peak source current
Avalanche ruggedness
Tmb = 25 °C
tp ⤠10 µs; pulsed; Tmb = 25 °C
EDS(AL)S
non-repetitive
VGS = 10 V; Tj(init) = 25 °C; ID = 35 A; Vsup = 15 V;
drain-source avalanche unclamped; tp = 0.1 ms; RGS = 50 â¦
energy
IDS(AL)S
non-repetitive
VGS = 10 V; Vsup = 15 V; RGS = 50 â¦;
drain-source avalanche Tj(init) = 25 °C; unclamped
current
Min Max Unit
-
100 V
-
100 V
-20 20
V
-
65
A
-
75
A
-
400 A
-
230 W
-55 175 °C
-55 175 °C
-30 30
V
-
75
A
-
400 A
-
120 mJ
-
75
A
PSMN009-100P_2
Product data sheet
Rev. 02 â 30 September 2009
© NXP B.V. 2009. All rights reserved.
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