SA56004X Datasheet, PDF(23/36 Page) NXP Semiconductors – 1 Degrees Celcious accurate, SMBus-compatible, 8-pin, remote/local digital temperature sensor with over temperature alarms

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SA56004X Datasheet, PDF (23/36 Pages) NXP Semiconductors – 1 Degrees Celcious accurate, SMBus-compatible, 8-pin, remote/local digital temperature sensor with over temperature alarms

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NXP Semiconductors

SA56004X

Digital temperature sensor with overtemperature alarms

Table 19. SMBus interface characteristics

VDD = 3.0 V to 3.6 V; Tamb = â40 Â°C to +125 Â°C; unless otherwise speciï¬ed.

These speciï¬cations are guaranteed by design and not tested in production.

Symbol Parameter

Conditions

VIH

HIGH-level input voltage

SCLK, SDATA; VDD = 2.7 V to 5.5 V

VIL

LOW-level input voltage

SCLK, SDATA; VDD = 2.7 V to 5.5 V

IOL

LOW-level output current

ALERT, T_CRIT; VOL = 0.4 V

SDATA; VOL = 0.6 V

IOH

LOW-level output current

IIL

LOW-level input current

IIH

HIGH-level input current

input capacitance

SCLK, SDATA

SMBus digital switching characteristics[1]

fSCLK

tLOW

tHIGH

tBUF

tHD;STA

tHD;DAT

tSU;DAT

tSU;STA

SCLK operating frequency

SCLK LOW time

SCLK HIGH time

SMBus free time[2]

hold time of START condition[3]

hold time of data[4]

set-up time of data in[5]

set-up time of repeat START

condition[6]

10 % to 10 %

90 % to 90 %

10 % of SDATA to 90 % of SCLK

90 % to 90 %

tSU;STO

tof

tto(SMBus)

set-up time of STOP condition[7] 90 % of SCLK to 90 % of SDATA

rise time

SCLK and SDATA

fall time

SCLK and SDATA

output fall time

SMBus time-out time[8]

CL = 400 pF; IO = 3 mA

Min Typ

2.2

1.0

6.0

â1.0 -

Max Unit

0.8

1.0

ÂµA

1.0

ÂµA

400 kHz

600 5000 -

600 -

300 -

250 -

Âµs

300 ns

250 ns

[1] The switching characteristics of the SA56004X fully meet or exceed all parameters speciï¬ed in SMBus version 2.0. The following

parameters specify the timing between the SCLK and SDATA signals in the SA56004X. They adhere to, but are not necessarily speciï¬ed

as the SMBus speciï¬cations.

[2] Delay from SDATA STOP to SDATA START.

[3] Delay from SDATA START to ï¬rst SCLK HIGH-to-LOW transition.

[4] Delay from SCLK HIGH-to-LOW transition to SDATA edges.

[5] Delay from SDATA edges to SCLK LOW-to-HIGH transition.

[6] Delay from SCLK LOW-to-HIGH transition to restart SDATA.

[7] Delay from SCLK HIGH-to-LOW transition to SDATA STOP condition.

[8] LOW period for reset of SMBus.

SA56004X_5

Product data sheet

Rev. 05 â 22 May 2008

23 of 36

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