SA56004X Datasheet, PDF (13/36 Pages) NXP Semiconductors – 1 Degrees Celcious accurate, SMBus-compatible, 8-pin, remote/local digital temperature sensor with over temperature alarms

NXP Semiconductors
SA56004X
Digital temperature sensor with overtemperature alarms
remote temperature high limit
remote diode temperature
ALERT pin
status register bit 4
(RHIGH)
A
B, C
D
E, F
002aad216
Fig 5. ALERT output in interrupt mode
The following events summarize the ALERT output interrupt mode of operation:
Event A: Master senses ALERT output being active-LOW.
Event B: Master reads the SA56004X Status register to determine what cause the
ALERT interrupt.
Event C: SA56004X clears the Status register, resets the ALERT output HIGH, and sets
the ALERT mask bit 7 in the Configuration register.
Event D: A new conversion result indicates the temperature is still above the high limit,
however the ALERT pin is not activated due to the ALERT mask.
Event E: Master should correct the conditions that caused the ALERT output to be
triggered. For instance, the fan is started, setpoint levels are adjusted.
Event F: Master resets the ALERT mask bit 7 in the Configuration register.
7.9.1.3 ALERT output in SMBus ALERT mode
When several slave devices share a common interrupt line, an SMBus alert line is
implemented. The SA56004X is designed to accommodate the Alert interrupt detection
capability of the SMBus 2.0 Alert Response Address (ARA) protocol, defined in SMBus
specification 2.0. This procedure is designed to assist the master in resolving which slave
device generated the interrupt and in servicing the interrupt while minimizing the time to
restore the system to its proper operation. Basically, the SMBus provides Alert response
interrupt pointers in order to identify slave devices which have caused the Alert interrupt.
When the ARA command is received by all devices on the SMBus, the devices pulling the
SMBus alert line LOW send their device addresses to the master; await an
acknowledgement and then release the alert line. This requirement to disengage the
SMBus alert line prevents locking up the alert line. The SA56004X complies with this ARA
disengagement protocol by setting the ALERT mask bit 7 in the Configuration register at
address 09h after successfully sending out its address in response to an ARA command
and releasing the ALERT output. Once the mask bit is activated, the ALERT output will be
disabled until enabled by software. In order to enable the ALERT the master must read the
SA56004X_5
Product data sheet
Rev. 05 — 22 May 2008
© NXP B.V. 2008. All rights reserved.
13 of 36