DAC1208D750 Datasheet, PDF (16/98 Pages) NXP Semiconductors – Dual 12-bit DAC; up to 750 Msps; 2×, 4× or 8× interpolating with JESD204A interface

NXP Semiconductors
DAC1208D750
2×, 4× or 8× interpolating DAC with JESD204A
LANES
ref_A
mds_A_out
COMP
mds_A
MDS_A
I
DIG
BUFFER
Q
SYNC~
CLK
MGMT
DAC
CK
Fig 7. Multi-Device Synchronization (MDS) implementation
001aal073
Each DAC device of the system generates its own reference (ref_A in Figure 7).
If configured as a slave, an early-late comparator compares the internal reference with the
external reference provided by the MDS pins. The comparator controls an internal buffer
that is used to delay the samples.
DAC1208D750
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 6 December 2010
© NXP B.V. 2010. All rights reserved.
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