74HC193 Datasheet, PDF (16/30 Pages) NXP Semiconductors – Presettable synchronous 4-bit binary up/down counter

NXP Semiconductors
74HC193; 74HCT193
Presettable synchronous 4-bit binary up/down counter
Table 9.
Symbol
t_pd
t_THL
t_TLH
t_W
Dynamic characteristics type 74HCT193
Parameter
Conditions
Min
propagation
delay
CPU, CPD to Qn; ^[1]
see Figure 9
V_CC = 4.5 V
-
CPU to TCU; see
Figure 10
V_CC = 4.5 V
-
CPD to TCD; see
Figure 10
V_CC = 4.5 V
-
PL to Qn; see
Figure 11
V_CC = 4.5 V
-
MR to Qn; see
Figure 12
V_CC = 4.5 V
-
Dn to Qn; see
Figure 11
V_CC = 4.5 V
-
PL to TCU, PL to
TCD; see Figure 14
V_CC = 4.5 V
-
MR to TCU, MR to
TCD; see Figure 14
V_CC = 4.5 V
-
Dn to TCU, Dn to
TCD; see Figure 14
V_CC = 4.5 V
-
HIGH to LOW see Figure 12
output transition
time
V_CC = 4.5 V
-
LOW to HIGH see Figure 12
output transition
time
V_CC = 4.5 V
-
pulse width
CPU, CPD (HIGH
or LOW); see
Figure 9
V_CC = 4.5 V
25
MR (HIGH); see
Figure 12
V_CC = 4.5 V
20
PL (LOW); see
Figure 11
V_CC = 4.5 V
20
25 C
Typ
23
15
15
26
22
27
31
29
32
7
7
11
7
8
40 C to +85 C 40 C to +125 C Unit
Max
Min Max Min
Max
43
-
54
-
65 ns
27
-
34
-
41 ns
27
-
34
-
41 ns
46
-
58
-
69 ns
40
-
50
-
60 ns
46
-
58
-
69 ns
55
-
69
-
83 ns
55
-
69
-
83 ns
58
-
73
-
87 ns
15
-
19
-
22 ns
15
-
19
-
22 ns
-
31
-
38
- ns
-
25
-
30
- ns
-
25
-
30
- ns
74HC_HCT193
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 24 June 2013
© NXP B.V. 2013. All rights reserved.
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