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| TDA8920C Datasheet, PDF (15/40 Pages) NXP Semiconductors – 2 X110 W class-D power amplifier | |||
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NXP Semiconductors
TDA8920C
2 à 110 W class-D power ampliï¬er
12.2 Stereo and dual SE application characteristics
Table 9. Dynamic characteristics
VP = ±30 V; RL = 4 â¦; fi = 1 kHz; fosc = 345 kHz; RsL < 0.1 â¦[1]; Tamb = 25 °C; unless otherwise speciï¬ed.
Symbol Parameter
Conditions
Min Typ Max Unit
Po
output power
L = 22 µH; C = 680 nF; Tj = 85 °C
[2]
THD = 0.5 %; RL = 4 â¦
- 90 - W
THD = 10 %; RL = 4 â¦
- 110 - W
THD
total harmonic distortion
THD = 10 %; VP = ±27 V
Po = 1 W; fi = 1 kHz
Po = 1 W; fi = 6 kHz
- 80 - W
[3] -
0.05 -
%
[3] -
0.05 -
%
Gv(cl)
closed-loop voltage gain
29 30 31 dB
SVRR supply voltage ripple rejection
between pin VDDPn and SGND
Operating mode; fi = 100 Hz
Operating mode; fi = 1 kHz
Mute mode; fi = 100 Hz
Standby mode; fi = 100 Hz
[4] -
90 -
dB
[4] -
70 -
dB
[4] -
75 -
dB
[4] -
120 -
dB
between pin VSSPn and SGND
Operating mode; fi = 100 Hz
Operating mode; fi = 1 kHz
Mute mode; fi = 100 Hz
Standby mode; fi = 100 Hz
[4] -
80 -
dB
[4] -
60 -
dB
[4] -
80 -
dB
[4] -
115 -
dB
Zi
Vn(o)
input impedance
output noise voltage
between the input pins and SGND
45 63 - kâ¦
Operating mode; Rs = 0 â¦
[5] -
160 -
µV
Mute mode
[6] -
85 -
µV
αcs
channel separation
[7] -
70 -
dB
|âGv|
αmute
voltage gain difference
mute attenuation
fi = 1 kHz; Vi = 2 V (RMS)
- - 1 dB
[8] -
75 -
dB
CMRR common mode rejection ratio
Vi(CM) = 1 V (RMS)
- 75 - dB
ηpo
output power efï¬ciency
SE, RL = 4 â¦
- 88 - %
SE, RL = 6 â¦
- 90 - %
RDSon(hs) high-side drain-source on-state resistance
RDSon(ls) low-side drain-source on-state resistance
BTL, RL = 8 â¦
- 88 - %
[9] -
200 -
mâ¦
[9] -
190 -
mâ¦
[1] RsL is the series resistance of low-pass LC ï¬lter inductor in the application.
[2] Output power is measured indirectly; based on RDSon measurement; see Section 13.3.
[3] THD is measured from 22 Hz to 20 kHz, using AES17 20 kHz brickwall ï¬lter. Maximum limit is guaranteed but may not be 100 % tested.
[4] Vripple = Vripple(max) = 2 V (p-p); Rs = 0 â¦. Measured independently between VDDPn and SGND and between VSSPn and SGND.
[5] 22 Hz to 20 kHz, using AES17 20 kHz brickwall ï¬lter.
[6] 22 Hz to 22 kHz, using AES17 20 kHz brickwall ï¬lter; independent of Rs.
[7] Po = 1 W; Rs = 0 â¦; fi = 1 kHz.
[8] Vi = Vi(max) = 1 V (RMS); fi = 1 kHz.
[9] Leads and bond wires included.
TDA8920C_1
Preliminary data sheet
Rev. 01 â 29 September 2008
© NXP B.V. 2008. All rights reserved.
15 of 40
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