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M36W0R6050T1 Datasheet, PDF (6/22 Pages) STMicroelectronics – 64 Mbit (4 Mb ×16, Multiple Bank, Burst) Flash memory and 32 Mbit (2 Mb ×16) PSRAM, multi-chip package
Description
1
Description
M36W0R6050T1, M36W0R6050B1
The M36W0R6050T1 and M36W0R6050B1 combine two memories in a Multi-Chip
Package:
● a 64-Mbit, Multiple Bank Flash memory, the M58WR064HT/B, and
● a 32-Mbit Pseudo SRAM, the M69KB048BD.
The purpose of this document is to describe how the two memory components operate with
respect to each other. It must be read in conjunction with the M58WR064HT/B and
M69KB048BD datasheets, where all specifications required to operate the Flash memory
and PSRAM components are fully detailed. These datasheets are available from the
Numonyx web site: www.numonyx.com.
Recommended operating conditions do not allow more than one memory to be active at the
same time.
The memory is offered in a Stacked TFBGA88 (8 ×10 mm, 8 × 10 ball array, 0.8 mm pitch)
package. It is supplied with all the bits erased (set to ‘1’).
Figure 1. Logic diagram
VDDQF VPPF
VDDF
VDDP
22
A0-A21
EF
GF
WF
RPF
WPF
LF
KF
16
DQ0-DQ15
WAITF
M36W0R6050T1
M36W0R6050B1
E1P
GP
WP
E2P
UBP
LBP
VSS
Ai12035
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