M36W0R6040T3 Datasheet, PDF (6/23 Pages) Numonyx B.V – 64-Mbit (4 Mbits ×16, multiple bank, burst) Flash memory and 16-Mbit (1 Mbit ×16) or 32-Mbit (2 Mbits x16) PSRAM MCP

Summary description
1
Summary description
M36P0R9070E0
The M36P0R9070E0 combines two memory devices in one Multi-Chip Package:
● 512-Mbit Multiple Bank Flash memory (the M58PR512J).
● 128 Mbit PSRAM (the M69KB128AB).
The purpose of this document is to describe how the two memory components operate with
respect to each other. It should be read in conjunction with the M58PRxxxJ and
M69KB128AB datasheets, where all specifications required to operate the Flash memory
and PSRAM components are fully detailed. The M58PR512J and M69KB128AB datasheets
are available from www.numonyx.com.
Recommended operating conditions do not allow more than one memory to be active at the
same time.
The memory is offered in a Stacked TFBGA107 package. It is supplied with all the bits
erased (set to ‘1’).
Figure 1. Logic diagram
V_DDF V_CCP
V_DDQ V_PPF
25
A0-A24
E_F
G_F
W_F
RP_F
WP_F
L
K
DPD_F
E_P
G_P
W_P
CR_P
UB_P
LB_P
16
DQ0-DQ15
WAIT
M36P0R9070E0
V_SS
AI10845
6/23