M36W0R6040T3 Datasheet, PDF(14/23 Page) Numonyx B.V – 64-Mbit (4 Mbits ×16, multiple bank, burst) Flash memory and 16-Mbit (1 Mbit ×16) or 32-Mbit (2 Mbits x16) PSRAM MCP

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M36W0R6040T3 Datasheet, PDF (14/23 Pages) Numonyx B.V – 64-Mbit (4 Mbits ×16, multiple bank, burst) Flash memory and 16-Mbit (1 Mbit ×16) or 32-Mbit (2 Mbits x16) PSRAM MCP

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Functional description

M36P0R9070E0

The PSRAM and Flash memory components have separate power supplies but share the

same grounds. They are distinguished by two Chip Enable inputs: EF for Flash and EP for

the PSRAM.

Recommended operating conditions do not allow more than one device to be active at a

time. The most common example is a simultaneous read operations on the Flash memory

and the PSRAM which would result in a data bus contention. Therefore it is recommended

to put the other devices in the high impedance state when reading the selected device.

Figure 3. Functional block diagram

VDDF VPPF

A23-A24

RPF

WPF

512 Mbit

Flash

Memory

DPDF

A0-A22

VCCP

WAIT

VSS VDDQ

DQ0-DQ15

CRP

UBP

LBP

128Mbit

PSRAM

Ai11731

14/23

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