LMH7324_0710 Datasheet, PDF (9/20 Pages) National Semiconductor (TI) – Quad 700 ps High Speed Comparator with RSPECL Outputs

DEFINITIONS
This table provides a short description of the parameters used in the datasheet and in the timing diagram of Figure 3.
Symbol
Text
Description
I_B
Input Bias Current
I_OS
Input Offset Current
Current flowing in or out of the input pins, when both are biased at the
V_CM voltage as specified in the tables.
Difference between the input bias current of the inverting and non-inverting
inputs.
TC I_OS
V_OS
Average Input Offset Current Drift Temperature coefficient of I_OS.
Input Offset Voltage
Voltage difference needed between IN+ and IN− to make the outputs
change state, averaged for H to L and L to H transitions.
TC V_OS
V_RI
V_RID
Average Input Offset Voltage Drift Temperature coefficient of V_OS.
Input Voltage Range
Voltage which can be applied to the input pin maintaining normal operation.
Input Differential Voltage Range
Differential voltage between positive and negative input at which the input
clamp is not working. The difference can be as high as the supply voltage
but excessive input currents are flowing through the clamp diodes and
protection resistors.
CMRR
Common Mode Rejection Ratio Ratio of input offset voltage change and input common mode voltage
change.
PSRR
A_V
Hyst
Power Supply Rejection Ratio
Active Gain
Hysteresis
Ratio of input offset voltage change and supply voltage change from V_S-
MIN ^{to V}S-MAX^.
Overall gain of the circuit.
Difference between the switching point ‘0’ to ‘1’ and vice versa.
V_OH
V_OL
V_OD
I_VCCI
I_VCCO
Output Voltage High
Output Voltage Low
Average of V_ODH and V_ODL
Supply Current Input Stage
Supply Current Output Stage
High state single ended output voltage (Q or Q). (See Figure 16)
Low state single ended output voltage (Q or Q). (See Figure 16)
(V_ODH + V_ODL)/2
Supply current into the input stage.
Supply current into the output stage while current through the load resistors
is excluded.
I_VEE
Supply Current V_EE Pin
Current flowing out of the negative supply pin.
TR
Maximum Toggle Rate
Maximum frequency at which the outputs can toggle at 50% of the nominal
V_OH and V_OL.
PW
Pulse Width
Time from 50% of the rising edge of a signal to 50% of the falling edge.
t_PDH resp t_PDL Propagation Delay
t_PDL resp t_PDH
t_PDLH
t_PDHL
t_PD
t_PDHd resp t_PDLd
t_OD-disp
t_SR-disp
Input Overdrive Dispersion
Input Slew Rate Dispersion
Delay time between the moment the input signal crosses the switching level
L to H and the moment the output signal crosses 50% of the rising edge of
Q output (t_PDH), or delay time between the moment the input signal crosses
the switching level H to L and the moment the output signal crosses 50% of
the falling edge of Q output (t_PDL).
Delay time between the moment the input signal crosses the switching level
L to H and the moment the output signal crosses 50% of the falling edge of
Q output (t_PDL), or delay time between the moment the input signal crosses
the switching level H to L and the moment the output signal crosses 50% of
the rising edge of Q output (t_PDH).
Average of t_PDH and t_PDL
Average of t_PDL and t_PDH
Average of t_PDLH and t_PDHL
Delay time between the moment the input signal crosses the switching level
L to H and the zero crossing of the rising edge of the differential output signal
(t_PDHd), or delay time between the moment the input signal crosses the
switching level H to L and the zero crossing of the falling edge of the
differential output signal (t_PDLd).
Change in t_PD for different overdrive voltages at the input pins.
Change in t_PD for different slew rates at the input pins.
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