LMH7324_0710 Datasheet, PDF (8/20 Pages) National Semiconductor (TI) – Quad 700 ps High Speed Comparator with RSPECL Outputs

Application Information
INTRODUCTION
The LMH7324 is a high speed comparator with RS(P)ECL
(Reduced Swing Positive Emitter Coupled Logic) outputs,
and is compatible with LVDS (Low Voltage Differential Sig-
naling) if V_CCO is set to 2.5V. The use of complementary
outputs gives a high level of suppression for common mode
noise. The very fast rise and fall times of the LMH7324 enable
data transmission rates up to several Gigabits per second
(Gbps). The LMH7324 inputs have a common mode voltage
range that extends 200 mV below the negative supply voltage
thus allowing ground sensing when used with a single supply.
The rise and fall times of the LMH7324 are about 150 ps, while
the propagation delay time is about 700 ps. The LMH7324
can operate over the supply voltage range of 5V to 12V, while
using single or dual supply voltages. This is a flexible way to
interface between several high speed logic families. Several
configurations are described in the section INTERFACE BE-
TWEEN LOGIC FAMILIES. The outputs are referenced to the
positive V_CCO supply rail. The supply current is 17 mA at 5V
(per comparator, load current excluded.) The LMH7324 is of-
fered in a 32-Pin LLP package. This small package is ideal
where space is an important issue.
INPUT & OUTPUT TOPOLOGY
All input and output pins are protected against excessive volt-
ages by ESD diodes. These diodes are conducting from the
negative supply to the positive supply. As can be seen in
Figure 1, both inputs are connected to these diodes. Protec-
tion against excessive supply voltages is provided by two
power clamps per comparator: one between the V_CCI and the
V_EE and one between the V_CCO and the V_EE.
The output stage of the LMH7324 is built using two emitter
followers, which are referenced to the V_CCO. (See Figure 2.)
Each of the output transistors is active when a current is flow-
ing through any external output resistor connected to a lower
supply rail. Activating the outputs is done by connecting the
emitters to a termination voltage which lies 2V below the
V_CCO. In this case a termination resistor of 50Ω can be used
and a transmission line of 50Ω can be driven. Another method
is to connect the emitters through a resistor to the most neg-
ative supply by calculating the right value for the emitter
current in accordance with the datasheet tables. Both meth-
ods are useful, but they each have good and bad aspects.
30017405
FIGURE 2. Equivalent Output Circuitry
The output voltages for ‘1’ and ‘0’ have a difference of ap-
proximately 400 mV and are respectively 1.1V (for the ‘1’) and
1.5V (for the ‘0’) below the V_CCO. This swing of 400 mV is
enough to drive any LVDS input but can also be used to drive
any ECL or PECL input, when the right supply voltage is cho-
sen, especially the right level for the V_CCO.
30017404
FIGURE 1. Equivalent Input Circuitry
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