LMH7324_0710 Datasheet, PDF (16/20 Pages) National Semiconductor (TI) – Quad 700 ps High Speed Comparator with RSPECL Outputs

comes down from high to low, the situation is stable until level
B is reached at t = 0. At this moment the output will toggle
back, and the circuit is back in the starting situation with the
inverting input at a much lower level than the non-inverting
input. In the situation without hysteresis, the output will toggle
exactly at V_REF. With hysteresis this happens at the internally
introduced levels A and B, as can be seen in Figure 15. If by
design the levels A and B which are due to a change in the
built-in hysteresis voltage are changed then the timing of t =
0 and t = 1 will also vary. When designing a circuit be aware
of this effect. Introducing hysteresis will cause some time shift
between output and input (e.g. duty cycle variations), but will
eliminate undesired switching of the output.
THE OUTPUT
Output Swing Properties
The LMH7324 has differential outputs, which means that both
outputs have the same swing but in opposite directions. (See
Figure 16.) Both outputs swing around the common mode
output voltage (V_O). This voltage can be measured at the
midpoint between two equal resistors connected to each out-
put. The absolute value of the difference between both volt-
ages is called V_OD. The outputs cannot be held at the V_O level
because of their digital nature. They only cross this level dur-
ing a transition. Due to the symmetrical structure of the circuit,
both output voltages cross at V_O regardless of whether the
output changes from ‘0’ to ‘1’ or vise versa.
Another parasitic capacity that can affect the output signal is
the capacity directly between both outputs, called C_PAR. (See
Figure 17.) The LMH7324 has two complementary outputs so
there is the possibility that the output signal will be transported
by a symmetrical transmission line. In this case both output
tracks form a coupled line with their own parasitics and both
receiver inputs are connected to the transmission line. Actu-
ally the line termination looks like 100Ω and the input capac-
ities, which are in series, are parallel to the 100Ω termination.
The best way to measure the input signal is to use a differ-
ential probe directly across both inputs. Such a probe is very
suitable for measuring these fast signals because it has good
high frequency characteristics and low parasitic capacitance.
FIGURE 16. Output Swing
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Loading the Output
Both outputs are activated when current is flowing through a
resistor that is externally connected to V_T. The termination
voltage should be set 2V below the V_CCO. This makes it pos-
sible to terminate each of the outputs directly with 50Ω, and
if needed to connect through a transmission line with the
same impedance. (See Figure 17.) Due to the low ohmic na-
ture of the output emitter followers and the 50Ω load resistor,
a capacitive load of several pF does not dramatically affect
the speed and shape of the signal. When transmitting the sig-
nal from one output to any input the termination resistor
should match the transmission line. The capacitive load (C_P)
will distort the received signal. When measuring this input with
a probe, a certain amount of capacitance from the probe is
parallel to the termination resistor. The total capacitance can
be as large as 10 pF. In this case there is a pole at:
f = 1/(2*π*C*R)
f = 1e9/ π
f = 318 MHz
For this frequency the current I_P has the same value as the
current through the termination resistor. This means that the
voltage drops at the input and the rise and fall times are dra-
matically different from the specified numbers for this part.
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FIGURE 17. Parasitic Capacities
TRANSMISSION LINES & TERMINATION
TECHNOLOGIES
The LMH7324 uses complementary RSPECL outputs and
emitter followers, which means high output current capability
and low sensitivity to parasitic capacitance. The use of Re-
duced Swing Positive Emitter Coupled Logic gives advan-
tages concerning speed and supply. Data rates are growing,
which requires increasing speed. Data is not only connected
to other IC’s on a single PCB board but, in many cases, there
are interconnections from board to board or from equipment
to equipment. Distances can be short or long but it is always
necessary to have a reliable connection, which consumes low
power and is able to handle high data rates. The complemen-
tary outputs of the LMH7324 make it possible to use sym-
metrical transmission lines. The advantage over single ended
signal transmission is that the LMH7324 has higher immunity
to common mode noise. Common mode signals are signals
that are equally apparent on both lines and because the re-
ceiver only looks at the difference between both lines, this
noise is canceled.
Maximum Bit Rates
The maximum toggle rate is defined at an amplitude of 50%
of the nominal output signal. This toggle rate is a number for
the maximum transfer rate of the part and can be given in Hz
or in Bps. When transmitting signals in a NRZ (Non Return to
Zero) format the bitrate is double this frequency number, be-
cause during one period two bits can be transmitted. (See
Figure 18.) The rise and fall times are very important specifi-
cations in high speed circuits. In fact these times determine
the maximum toggle rate of the part. Rise and fall times are
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