PC87417 Datasheet, PDF (87/257 Pages) National Semiconductor (TI) – LPC ServerI/O for Servers and Workstations

3.0 Device Architecture and Configuration (Continued)
3.16 REAL TIME CLOCK (RTC) CONFIGURATION
3.16.1 General Description
The RTC provides timekeeping and calendar management capabilities. It uses a 32.768 KHz signal as the basic clock for
timekeeping. The RTC also includes 242 bytes of battery-backed RAM for general-purpose use.
The RTC runtime registers are shown in Section 8.3.2 on page 150. These registers are V_PP powered.
3.16.2 Logical Device 10 (RTC) Configuration
Table 30 lists the configuration registers that affect the Real Time Clock. The standard configuration registers (see Section
3.2.3 on page 40) are powered by V_DD. The specific configuration registers are powered by V_SB.
Table 30. RTC Configuration Registers
Index
RTC Configuration Register or Action
30h
Activate (see Section 3.3.1 on page 43). When bit 0 is cleared, the runtime
registers of this logical device are not accessible.
60h Standard Base Address MSB register.
61h Standard Base Address LSB register. Bit 0 (for A0) is read only 0b.
62h Extended RAM Base Address MSB register.
63h Extended RAM Base Address LSB register. Bit 0 (for A0) is read only 0b.
70h RTC Interrupt Number and Wake-Up on IRQ Enable register.
71h RTC Interrupt Type. Bit 1 is read/write; other bits are read only.
74h Report no DMA assignment.
75h Report no DMA assignment.
F0h RAM Lock Register (RLR).
F1h Date-of-Month Alarm Register Offset (DOMAO).
F2h Month Alarm Register Offset (MONAO).
F3h Century Register Offset (CENO).
Type Power Well Reset
R/W
V_DD
00h
R/W
V_DD
00h
R/W
V_DD
70h
R/W
V_DD
00h
R/W
V_DD
72h
R/W
V_DD
08h
R/W
V_DD
00h
RO
V_DD
04h
RO
V_DD
04h
R/W1S
V_SB
00h
R/W
V_SB
00h
R/W
V_SB
00h
R/W
V_SB
00h
Revision 1.2
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