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PC87417 Datasheet, PDF (123/257 Pages) National Semiconductor (TI) – LPC ServerI/O for Servers and Workstations
6.0 ACCESS.bus Interface (Continued)
Table 33. Logical Device Number (LDN) Assignment for ACCESS.bus
LDN
Functional Block
00h
Floppy Disk Controller (FDC)
01h
Parallel Port (PP)
02h
Serial Port 2 (SP2)
03h
Serial Port 1 (SP1)
04h
System Wake-Up Control (SWC)
06h
Keyboard and Mouse Controller (KBC)1
07h
General-Purpose I/O (GPIO) Ports
0Fh
X-Bus Extension (PC87417)
10h
Real Time Clock (RTC)2
30h
PM1b_EVT_BLK (SWC-ACPI)
31h
PM1b_CNT_BLK (SWC-ACPI)
32h
GPE1_BLK (SWC-ACPI)
3Eh
Device Configuration (CONFIG)3,4
3Fh
ACCESS.bus Interface (ACB)3
1. This Logical Device has two chip selects for the Index/Data registers, each
pointed to by a different Base Address in the configuration. The A2 bit of the Off-
set Address Byte differentiates between the two chip selects:
A2 = 0: the Index/Data registers pointed to by the Base Address at 60h and 61h
A2 = 1: the Index/Data registers pointed to by the Base Address at 62h and 63h.
2. This Logical Device has two chip selects for the Index/Data registers, each
pointed to by a different Base Address in the configuration. The A1 bit of the Off-
set Address Byte differentiates between the two chip selects (see Note 1
above).
3. This Logical Device is accessible only through the ACCESS.bus.
4. Access to this Logical Device is through the Index register located at offset 00h
and data register located at offset 01h.
Offset Address Byte Type
This is an 8-bit value representing either of the following:
• Internal access - the offset address from the base of the functional block.
• External access - eight bits of the offset address from the base of the X-Bus chip-select (PC87417).
The offset address value must be within the defined range for the selected Logical Device or X-Bus chip-select. Offset values
outside this range are reserved.
Data Byte Type
This is an 8-bit value representing either the written or read data.
PEC Byte Type
This is an 8-bit value representing the 8-bit cyclic redundancy check of all the transferred bytes (see Section 6.2.8 on
page 120).
Revision 1.2
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