PC87417 Datasheet, PDF (57/257 Pages) National Semiconductor (TI) – LPC ServerI/O for Servers and Workstations

3.0 Device Architecture and Configuration (Continued)
3.7.11 ACCESS.bus Configuration (ACBCF) Register
This register is relevant only for the PC87413 and PC87417. In the PC87414 and PC87416, all bits are held at their
default value.
This register may be written only once. All eight bits must be updated in a single write operation, after which the data in the
register becomes read only. The register is cleared and the write-lock released only by V_PP Power-Up reset.
Power Well:V_PP
Location:Index 2Ah
Type: R/W or RO
Bit
7
6
5
4
3
2
1
0
Name
ACBPUEN
ACBSADD
Reset
0
0
0
0
0
0
0
0
Bit
Description
7 ACBPUEN (ACCESS.bus Signals Pull-Up Enable). This bit controls the internal pull-up resistors connected to
the ACBCLK and ACBDAT signals (see Section 1.5 on page 30).
0: Disconnected (default)
1: Connected
6-0 ACBSADD (ACCESS.bus Slave Address). This field defines the slave address on the ACCESS.bus for the
PC8741x devices. This address, once programmed by the host, is preserved as long as the V_PP power is active
(V_SB or V_BAT). The 7-bit slave address is used to access the PC8741x devices (see Section 6.2.6 on page 119).
A non-zero value read from this field indicates that ACBSADD contains a valid slave address.
Revision 1.2
57
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