PC87417 Datasheet, PDF (1/257 Pages) National Semiconductor (TI) – LPC ServerI/O for Servers and Workstations

July 2003
Revision 1.2
PC87413, PC87414, PC87416, PC87417
LPC ServerI/O for Servers and Workstations
General Description
The National Semiconductor^® PC8741x family of LPC Serv-
erI/O devices (“PC8741x”) comprises highly integrated Ad-
vanced I/O products. The PC8741x is targeted for a wide
range of servers and workstations that use the Low Pin Count
(LPC) bus for the host interface and the serial ACCESS.bus
or SMBus^® for the embedded controller interface.
The PC8741x features an X-Bus extension for read and write
operations over the X-Bus for both LPC and ACCESS.bus
cycles. Boot Flash and I/O devices can be accessed over this
X-Bus.
Embedded controllers can access the PC8741x and its X-Bus
via the ACCESS.bus or SMBus serial interface when V_SB
exists, regardless of the LPC bus state. Some of the
PC8741x logical devices can be disabled, or their pins can be
floated, under control of the V_SB-powered serial bus.
The PC8741x provides a V_SB-powered high-frequency clock
for on-chip peripherals and for other V_SB-powered platform
components.
The PC8741x’s extended wake-up support complements the
chipset’s ACPI controller and the platform embedded control-
lers. The PC8741x can monitor the Power and Sleep buttons
and control the power supply of simple platforms that lack an
embedded controller. The System Wake-Up Control (SWC)
module is powered by V_SB and V_BAT power supplies. It sup-
ports flexible wake-up and power-off request mechanisms in
any sleep state. It features Main and Standby power-on
elapsed-time counters.
The PC8741x also incorporates a Floppy Disk Controller
(FDC), two serial ports (UARTs), a Keyboard and Mouse
Controller (KBC), a Real-Time Clock (RTC), a fully compliant
IEEE 1284 Parallel Port, General-Purpose Input/Output
(GPIO) for a total of 51 ports and an Interrupt Serializer for
Parallel IRQs.
Outstanding Features
s LPC Interface, based on Intel’s LPC Interface Specifi-
cation, Revision 1.0, September 29th, 1997
s V_SB-powered access to modules through ACCESS.bus
or SMBus (PC87413 and PC87417)
s X-Bus Extension for memory and I/O (PC87416 and
PC87417)
s PC01 Revision 0.5 and ACPI Revision 1.0b compliant
s ServerI/O modules: Parallel Port, FDC, two Serial Ports
(UARTs) and a Keyboard and Mouse Controller (KBC)
s Y2K-compliant RTC with 242 bytes of RAM
s 51 GPIO ports with a variety of wake-up events
s Extremely low current consumption in Battery Backup mode
s 128-pin PQFP package
Block Diagram
PC87417(See page 5 for other PC8741x diagrams.)
Serial
Interface
ServerI/O
Clock
Serial
V_DD
Port 1
Serial
Interface
Serial
Port 2
Parallel Port
Interface
IEEE 1284
Parallel Port
Floppy Drive Keyboard Mouse LPC Serial
Interface Interface Interface Interface IRQ
Floppy Disk
Controller
Keyboard &
Mouse Controller
LPC Bus
Interface
V_BAT
V_SB
System
Wake-Up Control
Power
On
Timers
RTC
Internal Clocks
Clock
GPIO
Generator Ports
X-Bus
Extension
Device
Configuration
ACCESS.bus
Interface
Wake-Up Power SCI &
Events Control SMI
Low-F High-F I/O X-Bus XIRQ Clock Serial
32.768 KHz Clock Clock Ports Interface
Data
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