DS90CR485 Datasheet, PDF (8/16 Pages) National Semiconductor (TI) – 133MHz 48-bit Channel Link Serializer (6.384 Gbps)

DS90CR485 Pin Description—Channel Link Serializer (Continued)
Pin Name I/O
TEST1
I
TEST2
I
NC
V_CC
P
GND
G
V_CC3V
P
GND_3V
G
PLLV_CC
P
PLLGND
G
LVDSV_CC
P
LVDSGND G
No. of
Pins
1
1
14
3
6
1
1
2
3
4
5
Description
This pin should be tied low or left open. Tied to high (V_CC) or pulled to high (V_CC) is reserved for
future use. (Note 9)
This pin should be tied low or left open. Tied to high (V_CC) or pulled to high (V_CC) is reserved for
future use. (Note 9)
No connect. Make NO Connection to these pins - leave open.
2.5V Power supply pins for core logic.
Ground pins for 2.5V power supply.
3.3V Power supply pin for 3V tolerant input support.
Ground pin for 3.3V power supply.
Power supply pins for PLL circuitry. Connect to 2.5V power supply.
Ground pins for PLL circuitry.
Power supply pins for LVDS outputs. Connect to 2.5V power supply.
Ground pins for LVDS outputs.
Note 8: V_CC3V pins must proceed power up before other V_CC pins. See Application Information Section for detail.
Note 9: Inputs default to “low” when left open due to internal pull-down resistor.
LVDS Interface
20019535
FIGURE 9. 48 LVCMOS/LVTLL Inputs Mapped to 8 LVDS Outputs (DC Balance Mode- Disabled; BAL = Low)
(E1 - Falling Edge; E2 - Rising Edge)
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