DS90CR285 Datasheet, PDF (7/17 Pages) National Semiconductor (TI) – +3.3V Rising Edge Data Strobe LVDS 28-Bit Channel Link-66 MHz

AC Timing Diagrams (Continued)
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FIGURE 3. DS90CR286 (Receiver) CMOS/TTL Output Load and Transition Times
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FIGURE 4. DS90CR285 (Transmitter) Input Clock Transition Time
Note 8: Measurements at V_DIFF = 0V
Note 9: TCCS measured between earliest and latest LVDS edges.
Note 10: TxCLK Differential Low→High Edge
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FIGURE 5. DS90CR285 (Transmitter) Channel-to-Channel Skew
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