DS90CR285 Datasheet, PDF (1/17 Pages) National Semiconductor (TI) – +3.3V Rising Edge Data Strobe LVDS 28-Bit Channel Link-66 MHz

July 2004
DS90CR285/DS90CR286
+3.3V Rising Edge Data Strobe LVDS 28-Bit Channel
Link-66 MHz
General Description
The DS90CR285 transmitter converts 28 bits of LVCMOS/
LVTTL data into four LVDS (Low Voltage Differential Signal-
ing) data streams. A phase-locked transmit clock is transmit-
ted in parallel with the data streams over a fifth LVDS link.
Every cycle of the transmit clock 28 bits of input data are
sampled and transmitted. The DS90CR286 receiver con-
verts the LVDS data streams back into 28 bits of LVCMOS/
LVTTL data. At a transmit clock frequency of 66 MHz, 28 bits
of TTL data are transmitted at a rate of 462 Mbps per LVDS
data channel. Using a 66 MHz clock, the data throughput is
1.848 Gbit/s (231 Mbytes/s).
The multiplexing of the data lines provides a substantial
cable reduction. Long distance parallel single-ended buses
typically require a ground wire per active signal (and have
very limited noise rejection capability). Thus, for a 28-bit wide
data and one clock, up to 58 conductors are required. With
the Channel Link chipset as few as 11 conductors (4 data
pairs, 1 clock pair and a minimum of one ground) are
needed. This provides a 80% reduction in required cable
width, which provides a system cost savings, reduces con-
nector physical size and cost, and reduces shielding require-
ments due to the cables’ smaller form factor.
The 28 LVCMOS/LVTTL inputs can support a variety of
signal combinations. For example, seven 4-bit nibbles or
three 9-bit (byte + parity) and 1 control.
Features
n Single +3.3V supply
n Chipset (Tx + Rx) power consumption <250 mW (typ)
n Power-down mode (<0.5 mW total)
n Up to 231 Megabytes/sec bandwidth
n Up to 1.848 Gbps data throughput
n Narrow bus reduces cable size
n 290 mV swing LVDS devices for low EMI
n +1V common mode range (around +1.2V)
n PLL requires no external components
n Both devices are offered in a Low profile 56-lead
TSSOP package
n Rising edge data strobe
n Compatible with TIA/EIA-644 LVDS standard
n ESD Rating > 7 kV
n Operating Temperature: −40˚C to +85˚C
Block Diagrams
DS90CR285
DS90CR286
Order Number DS90CR285MTD
See NS Package Number MTD56
01291001
01291027
Order Number DS90CR286MTD
See NS Package Number MTD56
TRI-STATE^® is a registered trademark of National Semiconductor Corporation.
© 2004 National Semiconductor Corporation DS012910
www.national.com