NS32FX211 Datasheet, PDF (6/12 Pages) National Semiconductor (TI) – Microprocessor Compatible Real Time C

Functional Description (Continued)
TABLE I Address Decoding of Real-Time Clock Internal Registers
Registered Select
0 Control Register
1 Tenths of Seconds
2 Units Seconds
3 Tens Seconds
4 Units Minutes
5 Tens Minutes
6 Unit Hours
7 Tens Hours
8 Units Days
9 Tens Days
10 Units Months
11 Tens Months
12 Units Years
13 Tens Years
14 Days of Week
15 Clock Setting
Interrupt Registers
AD3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
Address (Binary)
AD2
AD1
0
0
0
0
0
1
0
1
1
0
1
0
1
1
1
1
0
0
0
0
0
1
0
1
1
0
1
0
1
1
1
1
AD0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
(Hex)
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
Access
Split Read and Write
Read Only
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
Day of Week Counter
The day of week counter increments as the time rolls from
23 59 to 00 00 (11 59 PM to 12 00 AM in 12-hour mode) It
counts from 1 to 7 and rolls back to 1 Any day of the week
may be specified as day 1
Clock Setting Register Interrupt Register
The interrupt select bit in the control register determines
which of these two registers is accessible to the processor
at address 15 Normal clock and interrupt timing operations
will always continue regardless of which register is selected
onto the bus The layout of these registers is shown in Table
II
The clock setting register is comprised of three separate
functions
a leap year counter bits 2 and 3
b AM PM indicator bit 1
c 12 24-hour mode set bit 0 (see Table IIA)
The leap year counter is a 2-stage binary counter which is
clocked by the months counter It changes state as the time
rolls over from 11 59 on December 31 to 00 00 on January
1
The counter should be loaded with the ‘number of years
since last leap year’ e g if 1980 was the last leap year a
clock programmed in 1983 should have 3 stored in the leap
year counter If the clock is programmed during a leap year
then the leap year counter should be set to 0 The contents
of the leap year counter can be read by the mP
The AM PM indicator returns a logic 0 for AM and a logic 1
for PM It is clocked when the hours counter rolls from 11 59
to 12 00 in 12-hour mode In 24-hour mode this bit is set to
logic 0
The 12 24-hour mode set determines whether the hours
counter counts from 1 to 12 or from 0 to 23 It also controls
the AM PM indicator enabling it for 12-hour mode and forc-
ing it to logic 0 for the 24-hour mode The 12 24-hour mode
bit is set to logic 0 for 12-hour mode and it is set to logic 1
for 24-hour mode
IMPORTANT NOTE Hours mode and AM PM bits cannot
be set in the same write operation See the section on Ini-
tialization (Methods of Device Operation) for a suggested
setting routine
All bits in the clock setting register may be read by the proc-
essor
The interrupt register controls the operation of the timer for
interrupt output The processor programs this register for
single or repeated interrupts at the selected time intervals
The lower three bits of this register set the time delay period
that will occur between interrupts The time delays that can
be programmed and the data words that select these are
outlined in Table IIB
Data bit 3 of the interrupt register sets for either single or
repeated interrupts logic 0 gives single mode logic 1 sets
for repeated mode
Using the interrupt is described in the Device Operation sec-
tion
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