DS92LV2411 Datasheet, PDF (33/40 Pages) National Semiconductor (TI) – 5-50MHz 24-Bit Channel Link II Serializer and Deserializer

FIGURE 30. Serial Control Bus — READ
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FIGURE 31. Serial Control Bus — WRITE
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TABLE 12. SERIALIZER — Serial Bus Control Registers
ADD ADD Register Name Bit(s)
(dec) (hex)
0 0 Ser Config 1
7
6
5
R/W
R/W
R/W
R/W
Defa Function
ult
(bin)
0 Reserved
0 Reserved
0 RFB
4 R/W 0 VODSEL
3:2 R/W 00 CONFIG
1 1 Device ID
1 R/W 0 SLEEP
0 R/W 0 REG
7 R/W 0 REG ID
6:0 R/W 1101 ID[X]
000
2 2 De-Emphasis
Control
7:5 R/W 000 De-E Setting
4 R/W 0 De-E EN
3:0 R/W 000 Reserved
Description
Reserved
Reserved
0: Data latched on Falling edge of CLKIN
1: Data latched on Rising edge of CLKIN
0: Low
1: High
00: Control Signal Filter Disabled
01: Control Signal Filter Enabled
10: Reserved
11: Reserved
Note – not the same function as PowerDown (PDB)
0: normal mode
1: Sleep Mode – Register settings retained.
0: Configurations set from control pins
1: Configuration set from registers (except I2C_ID)
0: Address from ID[X] Pin
1: Address from Register
Serial Bus Device ID, Four IDs are:
7b '1101 001 (h'69)
7b '1101 010 (h'6A)
7b '1101 011 (h'6B)
7b '1101 110 (h'6E)
All other addresses are Reserved.
000: set by external Resistor
001: -1 dB
010: -2 dB
011: -3.3 dB
100: -5 dB
101: -6.7 dB
110: -9 dB
111: -12 dB
0: De-Emphasis Enabled
1: De-Emphasis Disabled
Reserved
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